i965/fs: Combine generate_math[12]_gen6 methods.

These used to call different math emitters (brw_math vs. brw_math2).
Now that they both call gen6_math, they're virtually identical.

When unrolling SIMD16 to multiple SIMD8 operations, we should take care
not to apply sechalf to brw_null_reg for src1.  Otherwise, we'd end up
with BRW_ARF_NULL + 1 as the register number, and I'm not sure if that's
valid.

Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Matt Turner <mattst88@gmail.com>
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>

diff --git a/src/mesa/drivers/dri/i965/brw_fs.h b/src/mesa/drivers/dri/i965/brw_fs.h
index 9c4e116e3f6525723aaee9fa991e4b423504d95f..f9e0daff17560cedcc392b5e202c40260f9ab603 100644 (file)
--- a/src/mesa/drivers/dri/i965/brw_fs.h
+++ b/src/mesa/drivers/dri/i965/brw_fs.h
@@ -627,13 +627,10 @@ private:
    void generate_linterp(fs_inst *inst, struct brw_reg dst,
                         struct brw_reg *src);
    void generate_tex(fs_inst *inst, struct brw_reg dst, struct brw_reg src);
-   void generate_math1_gen6(fs_inst *inst,
-                           struct brw_reg dst,
-                           struct brw_reg src);
-   void generate_math2_gen6(fs_inst *inst,
-                           struct brw_reg dst,
-                           struct brw_reg src0,
-                           struct brw_reg src1);
+   void generate_math_gen6(fs_inst *inst,
+                           struct brw_reg dst,
+                           struct brw_reg src0,
+                           struct brw_reg src1);
    void generate_math_gen4(fs_inst *inst,
                           struct brw_reg dst,
                           struct brw_reg src);

diff --git a/src/mesa/drivers/dri/i965/brw_fs_generator.cpp b/src/mesa/drivers/dri/i965/brw_fs_generator.cpp
index 9a592747458def26347bfc18601651c3d3970552..3787d24680117c9b3ce2923b42cd30cdad3e721c 100644 (file)
--- a/src/mesa/drivers/dri/i965/brw_fs_generator.cpp
+++ b/src/mesa/drivers/dri/i965/brw_fs_generator.cpp
@@ -293,38 +293,21 @@ fs_generator::generate_linterp(fs_inst *inst,
 }
 
 void
-fs_generator::generate_math1_gen6(fs_inst *inst,
-                               struct brw_reg dst,
-                               struct brw_reg src0)
-{
-   int op = brw_math_function(inst->opcode);
-
-   assert(inst->mlen == 0);
-
-   brw_set_default_compression_control(p, BRW_COMPRESSION_NONE);
-   gen6_math(p, dst, op, src0, brw_null_reg());
-
-   if (dispatch_width == 16) {
-      brw_set_default_compression_control(p, BRW_COMPRESSION_2NDHALF);
-      gen6_math(p, sechalf(dst), op, sechalf(src0), brw_null_reg());
-      brw_set_default_compression_control(p, BRW_COMPRESSION_COMPRESSED);
-   }
-}
-
-void
-fs_generator::generate_math2_gen6(fs_inst *inst,
-                               struct brw_reg dst,
-                               struct brw_reg src0,
-                               struct brw_reg src1)
+fs_generator::generate_math_gen6(fs_inst *inst,
+                                 struct brw_reg dst,
+                                 struct brw_reg src0,
+                                 struct brw_reg src1)
 {
    int op = brw_math_function(inst->opcode);
+   bool binop = src1.file == BRW_GENERAL_REGISTER_FILE;
 
    brw_set_default_compression_control(p, BRW_COMPRESSION_NONE);
    gen6_math(p, dst, op, src0, src1);
 
    if (dispatch_width == 16) {
       brw_set_default_compression_control(p, BRW_COMPRESSION_2NDHALF);
-      gen6_math(p, sechalf(dst), op, sechalf(src0), sechalf(src1));
+      gen6_math(p, sechalf(dst), op, sechalf(src0),
+                binop ? sechalf(src1) : brw_null_reg());
       brw_set_default_compression_control(p, BRW_COMPRESSION_COMPRESSED);
    }
 }
@@ -1609,7 +1592,7 @@ fs_generator::generate_code(exec_list *instructions)
             gen6_math(p, dst, brw_math_function(inst->opcode), src[0],
                       brw_null_reg());
         } else if (brw->gen == 6) {
-           generate_math1_gen6(inst, dst, src[0]);
+           generate_math_gen6(inst, dst, src[0], brw_null_reg());
         } else if (brw->gen == 5 || brw->is_g4x) {
            generate_math_g45(inst, dst, src[0]);
         } else {
@@ -1623,7 +1606,7 @@ fs_generator::generate_code(exec_list *instructions)
         if (brw->gen >= 7) {
             gen6_math(p, dst, brw_math_function(inst->opcode), src[0], src[1]);
         } else if (brw->gen == 6) {
-           generate_math2_gen6(inst, dst, src[0], src[1]);
+           generate_math_gen6(inst, dst, src[0], src[1]);
         } else {
            generate_math_gen4(inst, dst, src[0]);
         }