(no commit message)

diff --git a/openpower/sv/bitmanip.mdwn b/openpower/sv/bitmanip.mdwn
index 06de1d0588479200458984a105d0bcac16b35c17..2a1421988a33ee59b72bf78e4a4a346f78044b8e 100644 (file)
--- a/openpower/sv/bitmanip.mdwn
+++ b/openpower/sv/bitmanip.mdwn
@@ -86,7 +86,7 @@ ternlog has its own major opcode
 
 3 ops 
 
-* grevlog
+* grevlog[w]
 * GF mul-add
 * bitmask-reverse
 
@@ -95,8 +95,9 @@ TODO: convert all instructions to use RT and not RS
 | 0.5|6.10|11.15|16.20 |21..25   | 26....30  |31| name |
 | -- | -- | --- | ---  | -----   | --------  |--| ------ |
 | NN | RT | RA  |itype/| im0-4   | im5-7  00 |0 | xpermi  |
-| NN | RT | RA  | RB   | im0-4   | im5-7  00 |1 | grevlog |
-| NN |    |     |      |         | -----  01 |m3| crternlogi |
+| NN |    |     |      |         |        00 |1 | rsvd    |
+| NN | RT | RA  | RB   | im0-4   | im5-7  01 |0 | grevlog |
+| NN | RT | RA  | RB   | im0-4   | im5-7  01 |1 | grevlogw |
 | NN | RT | RA  | RB   | RC      | mode  010 |Rc| bitmask\* |
 | NN | RT | RA  | RB   | RC      | 00    011 |nh| binlut |
 | NN |    |     |      |         | 01    011 |0 | svshape |