pixelBufferSize(p.pixel_buffer_size),
virtRefreshRate(p.virt_refresh_rate),
- // Registers
- version(VERSION_RESETV),
- int_rawstat(0), int_mask(0),
-
- fb_base(0), fb_line_length(0), fb_line_count(0), fb_line_pitch(0),
- bus_options(BUS_OPTIONS_RESETV),
-
- v_sync(0), v_back_porch(0), v_data(0), v_front_porch(0),
- h_sync(0), h_back_porch(0), h_data(0), h_front_porch(0),
- polarities(0),
-
- command(0),
-
- pixel_format(0),
- red_select(0), green_select(0), blue_select(0),
-
virtRefreshEvent([this]{ virtRefresh(); }, name()),
// Other
- imgFormat(p.frame_format), pic(NULL), conv(PixelConverter::rgba8888_le),
+ imgFormat(p.frame_format),
pixelPump(*this, *p.pxl_clk, p.pixel_chunk),
stats(this)
{
imgWriter = createImgWriter(imgFormat, &pixelPump.fb);
}
-HDLcd::~HDLcd()
-{
-}
-
HDLcd::
HDLcdStats::HDLcdStats(Stats::Group *parent)
: Stats::Group(parent, "HDLcd"),
assert(pkt->getAddr() >= pioAddr &&
pkt->getAddr() < pioAddr + pioSize);
- const Addr daddr(pkt->getAddr() - pioAddr);
+ const Addr daddr = pkt->getAddr() - pioAddr;
panic_if(pkt->getSize() != 4,
"Unhandled read size (address: 0x.4x, size: %u)",
daddr, pkt->getSize());
- const uint32_t data(readReg(daddr));
+ const uint32_t data = readReg(daddr);
DPRINTF(HDLcd, "read register 0x%04x: 0x%x\n", daddr, data);
pkt->setLE<uint32_t>(data);
assert(pkt->getAddr() >= pioAddr &&
pkt->getAddr() < pioAddr + pioSize);
- const Addr daddr(pkt->getAddr() - pioAddr);
+ const Addr daddr = pkt->getAddr() - pioAddr;
panic_if(pkt->getSize() != 4,
"Unhandled read size (address: 0x.4x, size: %u)",
daddr, pkt->getSize());
- const uint32_t data(pkt->getLE<uint32_t>());
+ const uint32_t data = pkt->getLE<uint32_t>();
DPRINTF(HDLcd, "write register 0x%04x: 0x%x\n", daddr, data);
writeReg(daddr, data);
PixelConverter
HDLcd::pixelConverter() const
{
- ByteOrder byte_order(
- pixel_format.big_endian ? ByteOrder::big : ByteOrder::little);
+ ByteOrder byte_order =
+ pixel_format.big_endian ? ByteOrder::big : ByteOrder::little;
/* Some Linux kernels have a broken driver that swaps the red and
* blue color select registers. */
return;
}
- const uint32_t dma_burst_flags(bus_options.burst_len);
- const uint32_t dma_burst_len(
- dma_burst_flags ?
- (1UL << (findMsbSet(dma_burst_flags) - 1)) :
- MAX_BURST_LEN);
+ const uint32_t dma_burst_flags = bus_options.burst_len;
+ const uint32_t dma_burst_len = dma_burst_flags ?
+ (1UL << (findMsbSet(dma_burst_flags) - 1)) : MAX_BURST_LEN;
// Some drivers seem to set the DMA line count incorrectly. This
// could either be a driver bug or a specification bug. Unlike for
// timings, the specification does not require 1 to be added to
// the DMA engine's line count.
- const uint32_t dma_lines(
- fb_line_count + (workaroundDmaLineCount ? 1 : 0));
+ const uint32_t dma_lines =
+ fb_line_count + (workaroundDmaLineCount ? 1 : 0);
dmaEngine.reset(new DmaEngine(
*this, pixelBufferSize,
void
HDLcd::setInterrupts(uint32_t ints, uint32_t mask)
{
- const bool old_ints(intStatus());
+ const bool old_ints = intStatus();
int_mask = mask;
int_rawstat = ints;
void
HDLcd::PixelPump::dumpSettings()
{
- const DisplayTimings &t(timings());
+ const DisplayTimings &t = timings();
inform("PixelPump width: %u", t.width);
inform("PixelPump height: %u", t.height);
{
public:
HDLcd(const HDLcdParams &p);
- ~HDLcd();
void serialize(CheckpointOut &cp) const override;
void unserialize(CheckpointIn &cp) override;
* HDLCD register contents.
*/
/**@{*/
- const VersionReg version; /**< Version register */
- uint32_t int_rawstat; /**< Interrupt raw status register */
- uint32_t int_mask; /**< Interrupt mask register */
- uint32_t fb_base; /**< Frame buffer base address register */
- uint32_t fb_line_length; /**< Frame buffer Line length register */
- FbLineCountReg fb_line_count; /**< Frame buffer Line count register */
- int32_t fb_line_pitch; /**< Frame buffer Line pitch register */
- BusOptsReg bus_options; /**< Bus options register */
- TimingReg v_sync; /**< Vertical sync width register */
- TimingReg v_back_porch; /**< Vertical back porch width register */
- TimingReg v_data; /**< Vertical data width register */
- TimingReg v_front_porch; /**< Vertical front porch width register */
- TimingReg h_sync; /**< Horizontal sync width register */
- TimingReg h_back_porch; /**< Horizontal back porch width register */
- TimingReg h_data; /**< Horizontal data width register */
- TimingReg h_front_porch; /**< Horizontal front porch width reg */
- PolaritiesReg polarities; /**< Polarities register */
- CommandReg command; /**< Command register */
- PixelFormatReg pixel_format; /**< Pixel format register */
- ColorSelectReg red_select; /**< Red color select register */
- ColorSelectReg green_select; /**< Green color select register */
- ColorSelectReg blue_select; /**< Blue color select register */
+ const VersionReg version = VERSION_RESETV;
+ /**< Version register */
+ uint32_t int_rawstat = 0; /**< Interrupt raw status register */
+ uint32_t int_mask = 0; /**< Interrupt mask register */
+ uint32_t fb_base = 0; /**< Frame buffer base address register */
+ uint32_t fb_line_length = 0; /**< Frame buffer Line length register */
+ /**< Frame buffer Line count register */
+ FbLineCountReg fb_line_count = 0;
+ int32_t fb_line_pitch = 0; /**< Frame buffer Line pitch register */
+ BusOptsReg bus_options = BUS_OPTIONS_RESETV;
+ /**< Bus options register */
+ TimingReg v_sync = 0; /**< Vertical sync width register */
+ TimingReg v_back_porch = 0; /**< Vertical back porch width register */
+ TimingReg v_data = 0; /**< Vertical data width register */
+ TimingReg v_front_porch = 0; /**< Vertical front porch width register */
+ TimingReg h_sync = 0; /**< Horizontal sync width register */
+ TimingReg h_back_porch = 0; /**< Horizontal back porch width reg */
+ TimingReg h_data = 0; /**< Horizontal data width register */
+ TimingReg h_front_porch = 0; /**< Horizontal front porch width reg */
+ PolaritiesReg polarities = 0; /**< Polarities register */
+ CommandReg command = 0; /**< Command register */
+ PixelFormatReg pixel_format = 0;/**< Pixel format register */
+ ColorSelectReg red_select = 0; /**< Red color select register */
+ ColorSelectReg green_select = 0;/**< Green color select register */
+ ColorSelectReg blue_select = 0; /**< Blue color select register */
/** @} */
uint32_t readReg(Addr offset);
* @see setInterrupts
* @param ints Set of interrupts to raise
*/
- void intRaise(uint32_t ints) {
+ void
+ intRaise(uint32_t ints)
+ {
setInterrupts(int_rawstat | ints, int_mask);
}
* @see setInterrupts
* @param ints Set of interrupts to clear
*/
- void intClear(uint32_t ints) {
+ void
+ intClear(uint32_t ints)
+ {
setInterrupts(int_rawstat & ~ints, int_mask);
}
void onVSyncBegin() override { return parent.pxlVSyncBegin(); }
void onVSyncEnd() override { return parent.pxlVSyncEnd(); }
- void onUnderrun(unsigned x, unsigned y) override {
+ void
+ onUnderrun(unsigned x, unsigned y) override
+ {
parent.pxlUnderrun();
}
Enums::ImageFormat imgFormat;
/** Picture of what the current frame buffer looks like */
- OutputStream *pic;
+ OutputStream *pic = nullptr;
/** Cached pixel converter, set when the converter is enabled. */
- PixelConverter conv;
+ PixelConverter conv = PixelConverter::rgba8888_le;
PixelPump pixelPump;
projects / gem5.git / commitdiff