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clarify
author
Luke Kenneth Casson Leighton
<lkcl@lkcl.net>
Tue, 24 Apr 2018 13:03:31 +0000
(14:03 +0100)
committer
Luke Kenneth Casson Leighton
<lkcl@lkcl.net>
Tue, 24 Apr 2018 13:03:31 +0000
(14:03 +0100)
simple_v_extension.mdwn
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diff --git
a/simple_v_extension.mdwn
b/simple_v_extension.mdwn
index 71c3f9190f972639ee6882fcb1e73a5ca7f15735..7aff13daf9a43aecfb01b46f9f6183b6ce440da7 100644
(file)
--- a/
simple_v_extension.mdwn
+++ b/
simple_v_extension.mdwn
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-1448,7
+1448,7
@@
So the question boils down to:
Whilst the above may seem to be severe minuses, there are some strong
pluses:
-* Significant reduction of V's opcode space: over
8
5%.
+* Significant reduction of V's opcode space: over
9
5%.
* Smaller reduction of P's opcode space: around 10%.
* The potential to use Compressed instructions in both Vector and SIMD
due to the overloading of register meaning (implicit vectorisation,