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Merge pull request #1778 from rswarbrick/sv-defines
authorN. Engelhardt <nak@symbioticeda.com>
Mon, 30 Mar 2020 11:51:12 +0000 (13:51 +0200)
committerGitHub <noreply@github.com>
Mon, 30 Mar 2020 11:51:12 +0000 (13:51 +0200)
Add support for SystemVerilog-style `define to Verilog frontend


Trivial merge