i965: Use brw->gen in some generation checks.

Will simplify the automated conversion if we want to allow compiling the
driver for a single generation.

Reviewed-by: Kristian Høgsberg <krh@bitplanet.net>

diff --git a/src/mesa/drivers/dri/i965/brw_eu.c b/src/mesa/drivers/dri/i965/brw_eu.c
index 3ecb4bc0da5966626a6ffba77df21db4cb6c4fcf..d2ff3f51fceeb7417eb6e40f6a943c4e2e9523b4 100644 (file)
--- a/src/mesa/drivers/dri/i965/brw_eu.c
+++ b/src/mesa/drivers/dri/i965/brw_eu.c
@@ -113,9 +113,11 @@ void
 brw_set_default_compression_control(struct brw_compile *p,
                            enum brw_compression compression_control)
 {
+   struct brw_context *brw = p->brw;
+
    p->compressed = (compression_control == BRW_COMPRESSION_COMPRESSED);
 
-   if (p->brw->gen >= 6) {
+   if (brw->gen >= 6) {
       /* Since we don't use the SIMD32 support in gen6, we translate
        * the pre-gen6 compression control here.
        */
@@ -158,7 +160,9 @@ void brw_set_default_saturate( struct brw_compile *p, bool enable )
 
 void brw_set_default_acc_write_control(struct brw_compile *p, unsigned value)
 {
-   if (p->brw->gen >= 6)
+   struct brw_context *brw = p->brw;
+
+   if (brw->gen >= 6)
       p->current->header.acc_wr_control = value;
 }
 

diff --git a/src/mesa/drivers/dri/i965/brw_eu_emit.c b/src/mesa/drivers/dri/i965/brw_eu_emit.c
index 98cc13ff4f51c3a86a395cd0ba143f783bd9b079..68b03b7a901e7450a77e97c99d427e757b6fc04f 100644 (file)
--- a/src/mesa/drivers/dri/i965/brw_eu_emit.c
+++ b/src/mesa/drivers/dri/i965/brw_eu_emit.c
@@ -1017,12 +1017,13 @@ void brw_##OP(struct brw_compile *p,                                          \
              struct brw_reg dest,                                            \
              struct brw_reg src)                                             \
 {                                                                            \
+   struct brw_context *brw = p->brw;                                         \
    struct brw_instruction *rnd, *add;                                        \
    rnd = next_insn(p, BRW_OPCODE_##OP);                                              \
    brw_set_dest(p, rnd, dest);                                               \
    brw_set_src0(p, rnd, src);                                                \
                                                                              \
-   if (p->brw->gen < 6) {                                                    \
+   if (brw->gen < 6) {                                                       \
       /* turn on round-increments */                                         \
       rnd->header.destreg__conditionalmod = BRW_CONDITIONAL_R;               \
       add = brw_ADD(p, dest, dest, brw_imm_f(1.0f));                         \

diff --git a/src/mesa/drivers/dri/i965/brw_schedule_instructions.cpp b/src/mesa/drivers/dri/i965/brw_schedule_instructions.cpp
index 34b036f321239e236082d35eade233d987f220d2..14f95791ae05a58f5fe81100108dd52817fd55be 100644 (file)
--- a/src/mesa/drivers/dri/i965/brw_schedule_instructions.cpp
+++ b/src/mesa/drivers/dri/i965/brw_schedule_instructions.cpp
@@ -882,7 +882,7 @@ fs_instruction_scheduler::calculate_deps()
         last_conditional_mod[inst->flag_subreg] = n;
       }
 
-      if (inst->writes_accumulator_implicitly(v->brw->gen) &&
+      if (inst->writes_accumulator_implicitly(v->brw) &&
           !inst->dst.is_accumulator()) {
          add_dep(last_accumulator_write, n);
          last_accumulator_write = n;
@@ -1002,7 +1002,7 @@ fs_instruction_scheduler::calculate_deps()
         last_conditional_mod[inst->flag_subreg] = n;
       }
 
-      if (inst->writes_accumulator_implicitly(v->brw->gen)) {
+      if (inst->writes_accumulator_implicitly(v->brw)) {
          last_accumulator_write = n;
       }
    }
@@ -1112,7 +1112,7 @@ vec4_instruction_scheduler::calculate_deps()
          last_conditional_mod = n;
       }
 
-      if (inst->writes_accumulator_implicitly(v->brw->gen) &&
+      if (inst->writes_accumulator_implicitly(v->brw) &&
           !inst->dst.is_accumulator()) {
          add_dep(last_accumulator_write, n);
          last_accumulator_write = n;
@@ -1197,7 +1197,7 @@ vec4_instruction_scheduler::calculate_deps()
          last_conditional_mod = n;
       }
 
-      if (inst->writes_accumulator_implicitly(v->brw->gen)) {
+      if (inst->writes_accumulator_implicitly(v->brw)) {
          last_accumulator_write = n;
       }
    }
@@ -1206,6 +1206,7 @@ vec4_instruction_scheduler::calculate_deps()
 schedule_node *
 fs_instruction_scheduler::choose_instruction_to_schedule()
 {
+   struct brw_context *brw = v->brw;
    schedule_node *chosen = NULL;
 
    if (mode == SCHEDULE_PRE || mode == SCHEDULE_POST) {
@@ -1276,7 +1277,7 @@ fs_instruction_scheduler::choose_instruction_to_schedule()
              * then the MRFs for the next SEND, then the next SEND, then the
              * MRFs, etc., without ever consuming the results of a send.
              */
-            if (v->brw->gen < 7) {
+            if (brw->gen < 7) {
                fs_inst *chosen_inst = (fs_inst *)chosen->inst;
 
                /* We use regs_written > 1 as our test for the kind of send

diff --git a/src/mesa/drivers/dri/i965/brw_shader.cpp b/src/mesa/drivers/dri/i965/brw_shader.cpp
index 12765038ebf405ad9f5eab26bcc73bcc9426ef38..6ad0ff4900b364019e2701be0f34ef6fb420385f 100644 (file)
--- a/src/mesa/drivers/dri/i965/brw_shader.cpp
+++ b/src/mesa/drivers/dri/i965/brw_shader.cpp
@@ -677,10 +677,10 @@ backend_instruction::reads_accumulator_implicitly() const
 }
 
 bool
-backend_instruction::writes_accumulator_implicitly(int gen) const
+backend_instruction::writes_accumulator_implicitly(struct brw_context *brw) const
 {
    return writes_accumulator ||
-          (gen < 6 &&
+          (brw->gen < 6 &&
            ((opcode >= BRW_OPCODE_ADD && opcode < BRW_OPCODE_NOP) ||
             (opcode >= FS_OPCODE_DDX && opcode <= FS_OPCODE_LINTERP &&
              opcode != FS_OPCODE_CINTERP)));

diff --git a/src/mesa/drivers/dri/i965/brw_shader.h b/src/mesa/drivers/dri/i965/brw_shader.h
index 222b0a933cdf1c056a254bf7782fdb1f88808099..cb47cdb46fe0f7ea634b58d21cf0fc13a2ca273c 100644 (file)
--- a/src/mesa/drivers/dri/i965/brw_shader.h
+++ b/src/mesa/drivers/dri/i965/brw_shader.h
@@ -51,7 +51,7 @@ public:
    bool can_do_source_mods() const;
    bool can_do_saturate() const;
    bool reads_accumulator_implicitly() const;
-   bool writes_accumulator_implicitly(int gen) const;
+   bool writes_accumulator_implicitly(struct brw_context *brw) const;
 
    /**
     * True if the instruction has side effects other than writing to