i386.h: Fix comment typo.

        * config/i386/i386.h: Fix comment typo.
        * config/i386/i386.md (shift+compare pattern names): s/cmpno/cmp/
        (ashr+compare patterns): Match CCGOCmode not CCNOmode.

From-SVN: r39070

diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index a891cb466fc739e81abee4c58d82d5ccaadc1ee8..ae77318e9c03f5e7094c088f5d8b714e8fc3dd74 100644 (file)
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,3 +1,9 @@
+2001-01-16  Richard Henderson  <rth@redhat.com>
+
+       * config/i386/i386.h: Fix comment typo.
+       * config/i386/i386.md (shift+compare pattern names): s/cmpno/cmp/
+       (ashr+compare patterns): Match CCGOCmode not CCNOmode.
+
 2001-01-16  Phil Edwards  <pme@sources.redhat.com>
 
        * gcc.c:  Revert previous -fsyntax-only-related change; move

diff --git a/gcc/config/i386/i386.h b/gcc/config/i386/i386.h
index 4845e392e0cb9a1f12939b8a6bbb321d9c895acd..016aac6c31a066d9bc5906e580470863572578e8 100644 (file)
--- a/gcc/config/i386/i386.h
+++ b/gcc/config/i386/i386.h
@@ -2505,7 +2505,7 @@ while (0)
    unspecified garbage in the Carry flag.  This mode is used
    by inc/dec instructions.
 
-   Add CCGCO to indicate comparisons agains zero that allows
+   Add CCGOC to indicate comparisons agains zero that allows
    unspecified garbage in the Carry and Overflow flag. This
    mode is used to simulate comparisons of (a-b) and (a+b)
    against zero using sub/cmp/add operations.

diff --git a/gcc/config/i386/i386.md b/gcc/config/i386/i386.md
index 5e53f14895c85ada431d9ae5f05564ebda0de280..1e50a6b9821ea40ef7d36718af04f5f01061e5f9 100644 (file)
--- a/gcc/config/i386/i386.md
+++ b/gcc/config/i386/i386.md
@@ -7715,7 +7715,7 @@
 ;; This pattern can't accept a variable shift count, since shifts by
 ;; zero don't affect the flags.  We assume that shifts by constant
 ;; zero are optimized away.
-(define_insn "*ashlsi3_cmpno"
+(define_insn "*ashlsi3_cmp"
   [(set (reg 17)
        (compare
          (ashift:SI (match_operand:SI 1 "nonimmediate_operand" "0")
@@ -7844,7 +7844,7 @@
 ;; This pattern can't accept a variable shift count, since shifts by
 ;; zero don't affect the flags.  We assume that shifts by constant
 ;; zero are optimized away.
-(define_insn "*ashlhi3_cmpno"
+(define_insn "*ashlhi3_cmp"
   [(set (reg 17)
        (compare
          (ashift:HI (match_operand:HI 1 "nonimmediate_operand" "0")
@@ -8011,7 +8011,7 @@
 ;; This pattern can't accept a variable shift count, since shifts by
 ;; zero don't affect the flags.  We assume that shifts by constant
 ;; zero are optimized away.
-(define_insn "*ashlqi3_cmpno"
+(define_insn "*ashlqi3_cmp"
   [(set (reg 17)
        (compare
          (ashift:QI (match_operand:QI 1 "nonimmediate_operand" "0")
@@ -8205,7 +8205,7 @@
 ;; This pattern can't accept a variable shift count, since shifts by
 ;; zero don't affect the flags.  We assume that shifts by constant
 ;; zero are optimized away.
-(define_insn "*ashrsi3_one_bit_cmpno"
+(define_insn "*ashrsi3_one_bit_cmp"
   [(set (reg 17)
        (compare
          (ashiftrt:SI (match_operand:SI 1 "nonimmediate_operand" "0")
@@ -8213,7 +8213,7 @@
          (const_int 0)))
    (set (match_operand:SI 0 "nonimmediate_operand" "=rm")
        (ashiftrt:SI (match_dup 1) (match_dup 2)))]
-  "ix86_match_ccmode (insn, CCNOmode)
+  "ix86_match_ccmode (insn, CCGOCmode)
    && (TARGET_PENTIUM || TARGET_PENTIUMPRO)
    && ix86_binary_operator_ok (ASHIFTRT, SImode, operands)"
   "sar{l}\\t%0"
@@ -8226,7 +8226,7 @@
 ;; This pattern can't accept a variable shift count, since shifts by
 ;; zero don't affect the flags.  We assume that shifts by constant
 ;; zero are optimized away.
-(define_insn "*ashrsi3_cmpno"
+(define_insn "*ashrsi3_cmp"
   [(set (reg 17)
        (compare
          (ashiftrt:SI (match_operand:SI 1 "nonimmediate_operand" "0")
@@ -8234,7 +8234,7 @@
          (const_int 0)))
    (set (match_operand:SI 0 "nonimmediate_operand" "=rm")
        (ashiftrt:SI (match_dup 1) (match_dup 2)))]
-  "ix86_match_ccmode (insn, CCNOmode)
+  "ix86_match_ccmode (insn, CCGOCmode)
    && ix86_binary_operator_ok (ASHIFTRT, SImode, operands)"
   "sar{l}\\t{%2, %0|%0, %2}"
   [(set_attr "type" "ishift")
@@ -8277,7 +8277,7 @@
 ;; This pattern can't accept a variable shift count, since shifts by
 ;; zero don't affect the flags.  We assume that shifts by constant
 ;; zero are optimized away.
-(define_insn "*ashrhi3_one_bit_cmpno"
+(define_insn "*ashrhi3_one_bit_cmp"
   [(set (reg 17)
        (compare
          (ashiftrt:HI (match_operand:HI 1 "nonimmediate_operand" "0")
@@ -8285,7 +8285,7 @@
          (const_int 0)))
    (set (match_operand:HI 0 "nonimmediate_operand" "=rm")
        (ashiftrt:HI (match_dup 1) (match_dup 2)))]
-  "ix86_match_ccmode (insn, CCNOmode)
+  "ix86_match_ccmode (insn, CCGOCmode)
    && (TARGET_PENTIUM || TARGET_PENTIUMPRO)
    && ix86_binary_operator_ok (ASHIFTRT, HImode, operands)"
   "sar{w}\\t%0"
@@ -8298,7 +8298,7 @@
 ;; This pattern can't accept a variable shift count, since shifts by
 ;; zero don't affect the flags.  We assume that shifts by constant
 ;; zero are optimized away.
-(define_insn "*ashrhi3_cmpno"
+(define_insn "*ashrhi3_cmp"
   [(set (reg 17)
        (compare
          (ashiftrt:HI (match_operand:HI 1 "nonimmediate_operand" "0")
@@ -8306,7 +8306,7 @@
          (const_int 0)))
    (set (match_operand:HI 0 "nonimmediate_operand" "=rm")
        (ashiftrt:HI (match_dup 1) (match_dup 2)))]
-  "ix86_match_ccmode (insn, CCNOmode)
+  "ix86_match_ccmode (insn, CCGOCmode)
    && ix86_binary_operator_ok (ASHIFTRT, HImode, operands)"
   "sar{w}\\t{%2, %0|%0, %2}"
   [(set_attr "type" "ishift")
@@ -8349,7 +8349,7 @@
 ;; This pattern can't accept a variable shift count, since shifts by
 ;; zero don't affect the flags.  We assume that shifts by constant
 ;; zero are optimized away.
-(define_insn "*ashrqi3_cmpno_one_bit"
+(define_insn "*ashrqi3_one_bit_cmp"
   [(set (reg 17)
        (compare
          (ashiftrt:QI (match_operand:QI 1 "nonimmediate_operand" "0")
@@ -8357,7 +8357,7 @@
          (const_int 0)))
    (set (match_operand:QI 0 "nonimmediate_operand" "=rm")
        (ashiftrt:QI (match_dup 1) (match_dup 2)))]
-  "ix86_match_ccmode (insn, CCNOmode)
+  "ix86_match_ccmode (insn, CCGOCmode)
    && (TARGET_PENTIUM || TARGET_PENTIUMPRO)
    && ix86_binary_operator_ok (ASHIFTRT, QImode, operands)"
   "sar{b}\\t%0"
@@ -8370,7 +8370,7 @@
 ;; This pattern can't accept a variable shift count, since shifts by
 ;; zero don't affect the flags.  We assume that shifts by constant
 ;; zero are optimized away.
-(define_insn "*ashrqi3_cmpno"
+(define_insn "*ashrqi3_cmp"
   [(set (reg 17)
        (compare
          (ashiftrt:QI (match_operand:QI 1 "nonimmediate_operand" "0")
@@ -8378,7 +8378,7 @@
          (const_int 0)))
    (set (match_operand:QI 0 "nonimmediate_operand" "=rm")
        (ashiftrt:QI (match_dup 1) (match_dup 2)))]
-  "ix86_match_ccmode (insn, CCNOmode)
+  "ix86_match_ccmode (insn, CCGOCmode)
    && ix86_binary_operator_ok (ASHIFTRT, QImode, operands)"
   "sar{b}\\t{%2, %0|%0, %2}"
   [(set_attr "type" "ishift")
@@ -8478,7 +8478,7 @@
 ;; This pattern can't accept a variable shift count, since shifts by
 ;; zero don't affect the flags.  We assume that shifts by constant
 ;; zero are optimized away.
-(define_insn "*lshrsi3_cmpno_one_bit"
+(define_insn "*lshrsi3_one_bit_cmp"
   [(set (reg 17)
        (compare
          (lshiftrt:SI (match_operand:SI 1 "nonimmediate_operand" "0")
@@ -8499,7 +8499,7 @@
 ;; This pattern can't accept a variable shift count, since shifts by
 ;; zero don't affect the flags.  We assume that shifts by constant
 ;; zero are optimized away.
-(define_insn "*lshrsi3_cmpno"
+(define_insn "*lshrsi3_cmp"
   [(set (reg 17)
        (compare
          (lshiftrt:SI (match_operand:SI 1 "nonimmediate_operand" "0")
@@ -8550,7 +8550,7 @@
 ;; This pattern can't accept a variable shift count, since shifts by
 ;; zero don't affect the flags.  We assume that shifts by constant
 ;; zero are optimized away.
-(define_insn "*lshrhi3_cmpno_one_bit"
+(define_insn "*lshrhi3_one_bit_cmp"
   [(set (reg 17)
        (compare
          (lshiftrt:HI (match_operand:HI 1 "nonimmediate_operand" "0")
@@ -8571,7 +8571,7 @@
 ;; This pattern can't accept a variable shift count, since shifts by
 ;; zero don't affect the flags.  We assume that shifts by constant
 ;; zero are optimized away.
-(define_insn "*lshrhi3_cmpno"
+(define_insn "*lshrhi3_cmp"
   [(set (reg 17)
        (compare
          (lshiftrt:HI (match_operand:HI 1 "nonimmediate_operand" "0")
@@ -8622,7 +8622,7 @@
 ;; This pattern can't accept a variable shift count, since shifts by
 ;; zero don't affect the flags.  We assume that shifts by constant
 ;; zero are optimized away.
-(define_insn "*lshrqi2_cmpno_one_bit"
+(define_insn "*lshrqi2_one_bit_cmp"
   [(set (reg 17)
        (compare
          (lshiftrt:QI (match_operand:QI 1 "nonimmediate_operand" "0")
@@ -8643,7 +8643,7 @@
 ;; This pattern can't accept a variable shift count, since shifts by
 ;; zero don't affect the flags.  We assume that shifts by constant
 ;; zero are optimized away.
-(define_insn "*lshrqi2_cmpno"
+(define_insn "*lshrqi2_cmp"
   [(set (reg 17)
        (compare
          (lshiftrt:QI (match_operand:QI 1 "nonimmediate_operand" "0")

diff --git a/gcc/testsuite/gcc.c-torture/execute/20010116-1.c b/gcc/testsuite/gcc.c-torture/execute/20010116-1.c
new file mode 100644 (file)
index 0000000..b77d6fb
--- /dev/null
+++ b/gcc/testsuite/gcc.c-torture/execute/20010116-1.c
@@ -0,0 +1,32 @@
+/* Distilled from optimization/863.  */
+
+extern void abort (void);
+extern void exit (int);
+extern void ok (int);
+
+typedef struct
+{
+  int x, y, z;
+} Data;
+
+void find (Data *first, Data *last)
+{
+  int i;
+  for (i = (last - first) >> 2; i > 0; --i)
+    ok(i);
+  abort ();
+}
+
+void ok(int i)
+{
+  if (i != 1)
+    abort ();
+  exit (0);
+}
+
+int
+main ()
+{
+  Data DataList[4];
+  find (DataList + 0, DataList + 4);
+}