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Added English Language description for lfsux instruction
author
Shriya Sharma
<shriya@redsemiconductor.com>
Tue, 3 Oct 2023 10:24:12 +0000
(11:24 +0100)
committer
Shriya Sharma
<shriya@redsemiconductor.com>
Tue, 3 Oct 2023 10:24:12 +0000
(11:24 +0100)
openpower/isa/fpload.mdwn
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diff --git
a/openpower/isa/fpload.mdwn
b/openpower/isa/fpload.mdwn
index e4d969608a0d44e01e0db4391eda8071b8d9ed3c..197b5c98e97480f8a41692fd6f097f8fc8ff6074 100644
(file)
--- a/
openpower/isa/fpload.mdwn
+++ b/
openpower/isa/fpload.mdwn
@@
-90,6
+90,19
@@
Pseudo-code:
FRT <- DOUBLE(MEM(EA, 4))
RA <- EA
+Description:
+
+ Let the effective address (EA) be the sum (RA)+(RB).
+
+ The word in storage addressed by EA is interpreted as
+ a floating-point single-precision operand. This word is
+ converted to floating-point double format (see
+ page 138) and placed into register FRT.
+
+ EA is placed into register RA.
+
+ If RA=0, the instruction form is invalid.
+
Special Registers Altered:
None