bfd/
authorMark Shinwell <shinwell@codesourcery.com>
Mon, 4 Sep 2006 07:11:11 +0000 (07:11 +0000)
committerMark Shinwell <shinwell@codesourcery.com>
Mon, 4 Sep 2006 07:11:11 +0000 (07:11 +0000)
        * elf32-arm.c (elf32_arm_howto_table_1): Adjust entries for
        R_ARM_THM_ALU_PREL_11_0 and R_ARM_THM_PC12 relocations.
        (elf32_arm_final_link_relocate): Handle R_ARM_THM_ALU_PREL_11_0
        and R_ARM_THM_PC12 relocations.

bfd/ChangeLog
bfd/elf32-arm.c

index e032bb60c2f7c747f8179287bc3c8ea1e12da6a7..fc7eca1ac14051068a4f204e44b7dc1f198348ae 100644 (file)
@@ -1,3 +1,10 @@
+2006-09-04  Mark Shinwell  <shinwell@codesourcery.com>
+
+        * elf32-arm.c (elf32_arm_howto_table_1): Adjust entries for
+        R_ARM_THM_ALU_PREL_11_0 and R_ARM_THM_PC12 relocations.
+        (elf32_arm_final_link_relocate): Handle R_ARM_THM_ALU_PREL_11_0
+        and R_ARM_THM_PC12 relocations.
+
 2006-08-24  Bob Wilson  <bob.wilson@acm.org>
 
        * elf32-xtensa.c (xtensa_get_property_section_name): Delete.
index 163114996b037983ea05d6e44d8ebfe81090ff85..530ef9987344dc5fc4da7cd29bed007812ae10b6 100644 (file)
@@ -835,12 +835,12 @@ static reloc_howto_type elf32_arm_howto_table_1[] =
         13,                    /* bitsize */
         TRUE,                  /* pc_relative */
         0,                     /* bitpos */
-        complain_overflow_signed,/* complain_on_overflow */
+        complain_overflow_dont,/* complain_on_overflow */
         bfd_elf_generic_reloc, /* special_function */
         "R_ARM_THM_ALU_PREL_11_0",/* name */
         FALSE,                 /* partial_inplace */
-        0x040070ff,            /* src_mask */
-        0x040070ff,            /* dst_mask */
+        0xffffffff,            /* src_mask */
+        0xffffffff,            /* dst_mask */
         TRUE),                 /* pcrel_offset */
 
   HOWTO (R_ARM_THM_PC12,       /* type */
@@ -849,12 +849,12 @@ static reloc_howto_type elf32_arm_howto_table_1[] =
         13,                    /* bitsize */
         TRUE,                  /* pc_relative */
         0,                     /* bitpos */
-        complain_overflow_signed,/* complain_on_overflow */
+        complain_overflow_dont,/* complain_on_overflow */
         bfd_elf_generic_reloc, /* special_function */
         "R_ARM_THM_PC12",      /* name */
         FALSE,                 /* partial_inplace */
-        0x040070ff,            /* src_mask */
-        0x040070ff,            /* dst_mask */
+        0xffffffff,            /* src_mask */
+        0xffffffff,            /* dst_mask */
         TRUE),                 /* pcrel_offset */
 
   HOWTO (R_ARM_ABS32_NOI,      /* type */
@@ -3945,6 +3945,81 @@ elf32_arm_final_link_relocate (reloc_howto_type *           howto,
       bfd_put_16 (input_bfd, value, hit_data);
       return bfd_reloc_ok;
 
+    case R_ARM_THM_ALU_PREL_11_0:
+      /* Corresponds to: addw.w reg, pc, #offset (and similarly for subw).  */
+      {
+       bfd_vma insn;
+       bfd_signed_vma relocation;
+
+       insn = (bfd_get_16 (input_bfd, hit_data) << 16)
+             | bfd_get_16 (input_bfd, hit_data + 2);
+
+        if (globals->use_rel)
+          {
+            signed_addend = (insn & 0xff) | ((insn & 0x7000) >> 4)
+                          | ((insn & (1 << 26)) >> 15);
+            if (insn & 0xf00000)
+              signed_addend = -signed_addend;
+          }
+
+       relocation = value + signed_addend;
+       relocation -= (input_section->output_section->vma
+                      + input_section->output_offset
+                      + rel->r_offset);
+
+        value = abs (relocation);
+
+        if (value >= 0x1000)
+          return bfd_reloc_overflow;
+
+       insn = (insn & 0xfb0f8f00) | (value & 0xff)
+             | ((value & 0x700) << 4)
+             | ((value & 0x800) << 15);
+        if (relocation < 0)
+          insn |= 0xa00000;
+
+       bfd_put_16 (input_bfd, insn >> 16, hit_data);
+       bfd_put_16 (input_bfd, insn & 0xffff, hit_data + 2);
+
+        return bfd_reloc_ok;
+      }
+
+    case R_ARM_THM_PC12:
+      /* Corresponds to: ldr.w reg, [pc, #offset].  */
+      {
+       bfd_vma insn;
+       bfd_signed_vma relocation;
+
+       insn = (bfd_get_16 (input_bfd, hit_data) << 16)
+             | bfd_get_16 (input_bfd, hit_data + 2);
+
+        if (globals->use_rel)
+          {
+            signed_addend = insn & 0xfff;
+            if (!(insn & (1 << 23)))
+              signed_addend = -signed_addend;
+          }
+
+       relocation = value + signed_addend;
+       relocation -= (input_section->output_section->vma
+                      + input_section->output_offset
+                      + rel->r_offset);
+
+        value = abs (relocation);
+
+        if (value >= 0x1000)
+          return bfd_reloc_overflow;
+
+       insn = (insn & 0xff7ff000) | value;
+        if (relocation >= 0)
+          insn |= (1 << 23);
+
+       bfd_put_16 (input_bfd, insn >> 16, hit_data);
+       bfd_put_16 (input_bfd, insn & 0xffff, hit_data + 2);
+
+        return bfd_reloc_ok;
+      }
+
     case R_ARM_THM_XPC22:
     case R_ARM_THM_CALL:
       /* Thumb BL (branch long instruction).  */