tb/asmicon_wb: better access pattern

diff --git a/tb/asmicon/asmicon_wb.py b/tb/asmicon/asmicon_wb.py
index bdc1d7daa23fb09ea44a053f901f31c793297f4a..28f6dc286d2a738c867c2673a7a4cbacc26e71d7 100644 (file)
--- a/tb/asmicon/asmicon_wb.py
+++ b/tb/asmicon/asmicon_wb.py
@@ -10,9 +10,18 @@ from common import sdram_phy, sdram_geom, sdram_timing, DFILogger
 l2_size = 8192 # in bytes
 
 def my_generator():
-       for x in range(100):
+       for x in range(20):
+               t = TWrite(x, x)
+               yield t
+               print(str(t) + " delay=" + str(t.latency))
+       for x in range(20):
                t = TRead(x)
                yield t
+               print(str(t) + " delay=" + str(t.latency))
+       for x in range(20):
+               t = TRead(x+l2_size//4)
+               yield t
+               print(str(t) + " delay=" + str(t.latency))
 
 def main():
        controller = ASMIcon(sdram_phy, sdram_geom, sdram_timing)