[NDS32] Implement movmisalignsi and movmisaligndi pattern.

gcc/
	* config/nds32/nds32.md (movmisalign<mode>): New pattern.

Co-Authored-By: Monk Chiang <sh.chiang04@gmail.com>
From-SVN: r259073

diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index 3555f35e18ceb73b43e9c5dcb498229368949d9b..8f97ac2bc385dda6930c54a7a24f880c530e0eb0 100644 (file)
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,3 +1,8 @@
+2018-04-04  Kito Cheng  <kito.cheng@gmail.com>
+           Monk Chiang  <sh.chiang04@gmail.com>
+
+       * config/nds32/nds32.md (movmisalign<mode>): New pattern.
+
 2018-04-04  Chung-Ju Wu  <jasonwucj@gmail.com>
 
        * config/nds32/nds32.md (movqi, movhi): Merge into mov<mode>.

diff --git a/gcc/config/nds32/nds32.md b/gcc/config/nds32/nds32.md
index 9a12598e21100f6d614c13f7763929b8e9fdd51a..68fe1b3c7f07119adfe5a1bf6aed4f483599e743 100644 (file)
--- a/gcc/config/nds32/nds32.md
+++ b/gcc/config/nds32/nds32.md
@@ -101,6 +101,27 @@
     }
 })
 
+(define_expand "movmisalign<mode>"
+  [(set (match_operand:SIDI 0 "general_operand" "")
+       (match_operand:SIDI 1 "general_operand" ""))]
+  ""
+{
+  rtx addr;
+  if (MEM_P (operands[0]) && !REG_P (operands[1]))
+    operands[1] = force_reg (<MODE>mode, operands[1]);
+
+  if (MEM_P (operands[0]))
+    {
+      addr = force_reg (Pmode, XEXP (operands[0], 0));
+      emit_insn (gen_unaligned_store<mode> (addr, operands[1]));
+    }
+  else
+    {
+      addr = force_reg (Pmode, XEXP (operands[1], 0));
+      emit_insn (gen_unaligned_load<mode> (operands[0], addr));
+    }
+  DONE;
+})
 
 (define_expand "movsi"
   [(set (match_operand:SI 0 "general_operand" "")