csr_op_is_valid)
#self.comb += self.handle_trap(m, mstatus, ft, dc, load_store_misaligned)
+ # CSR decoding
+ csr_number = Signal(12)
+ csr_input_value = Signal(32)
+ csr_reads = Signal()
+ csr_writes = Signal()
+
+ self.comb += csr_number.eq(dc.immediate)
+ self.comb += csr_input_value.eq(Mux(dc.funct3[2],
+ dc.rs1,
+ register_rs1))
+ self.comb += csr_reads.eq(dc.funct3[1] | (dc.rd != 0))
+ self.comb += csr_writes.eq(~dc.funct3[1] | (dc.rs1 != 0))
+
if __name__ == "__main__":
example = CPU()