Temporarily derive blackbox modules in hierarchy to evaluate port widths
authorClifford Wolf <clifford@clifford.at>
Thu, 4 Jan 2018 12:23:29 +0000 (13:23 +0100)
committerClifford Wolf <clifford@clifford.at>
Thu, 4 Jan 2018 12:23:29 +0000 (13:23 +0100)
Signed-off-by: Clifford Wolf <clifford@clifford.at>
passes/hierarchy/hierarchy.cc

index c460fbbfce158cdd24ed4e4f5609599bfdd2fcde..524d57854e7b9c540e0c5e66fb0ad67fc83834e7 100644 (file)
@@ -620,6 +620,8 @@ struct HierarchyPass : public Pass {
                        }
                }
 
+               std::set<Module*> blackbox_derivatives;
+
                for (auto module : design->modules())
                for (auto cell : module->cells())
                {
@@ -628,9 +630,17 @@ struct HierarchyPass : public Pass {
 
                        Module *m = design->module(cell->type);
 
-                       if (m == nullptr || m->get_bool_attribute("\\blackbox"))
+                       if (m == nullptr)
                                continue;
 
+                       if (m->get_bool_attribute("\\blackbox") && cell->parameters.size()) {
+                               IdString new_m_name = m->derive(design, cell->parameters);
+                               if (new_m_name != m->name) {
+                                       m = design->module(new_m_name);
+                                       blackbox_derivatives.insert(m);
+                               }
+                       }
+
                        for (auto &conn : cell->connections())
                        {
                                Wire *w = m->wire(conn.first);
@@ -673,6 +683,9 @@ struct HierarchyPass : public Pass {
                        }
                }
 
+               for (auto module : blackbox_derivatives)
+                       design->remove(module);
+
                log_pop();
        }
 } HierarchyPass;