def childImage(self, ci):
self.image.child.image_file = ci
- self = SparcSystem()
+ self = System()
if not mdesc:
# generic system
mdesc = SysConfig()
ide = IdeController(disks=Parent.disks,
pci_func=0, pci_dev=0, pci_bus=0)
- self = LinuxMipsSystem()
+ self = System()
if not mdesc:
# generic system
mdesc = SysConfig()
def makeX86System(mem_mode, numCPUs=1, mdesc=None, workload=None, Ruby=False):
- self = X86System()
+ self = System()
if workload is None:
workload = X86FsWorkload()
FsWorkload(Params *p);
void initState() override;
+
+ Addr
+ fixFuncEventAddr(Addr addr) const override
+ {
+ // Remove the low bit that thumb symbols have set
+ // but that aren't actually odd aligned
+ return addr & ~1;
+ }
};
} // namespace ArmISA
ArmSystem(Params *p);
- Addr
- fixFuncEventAddr(Addr addr) override
- {
- // Remove the low bit that thumb symbols have set
- // but that aren't actually odd aligned
- return addr & ~1;
- }
-
/** true if this a multiprocessor system */
bool multiProc;
+++ /dev/null
-# -*- mode:python -*-
-
-# Copyright (c) 2007 MIPS Technologies, Inc.
-# All rights reserved.
-#
-# Redistribution and use in source and binary forms, with or without
-# modification, are permitted provided that the following conditions are
-# met: redistributions of source code must retain the above copyright
-# notice, this list of conditions and the following disclaimer;
-# redistributions in binary form must reproduce the above copyright
-# notice, this list of conditions and the following disclaimer in the
-# documentation and/or other materials provided with the distribution;
-# neither the name of the copyright holders nor the names of its
-# contributors may be used to endorse or promote products derived from
-# this software without specific prior written permission.
-#
-# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
-# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
-# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
-# A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
-# OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
-# SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
-# LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
-# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
-# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
-# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
-# OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-
-from m5.defines import buildEnv
-from m5.params import *
-from m5.proxy import *
-
-from m5.objects.System import System
-
-class MipsSystem(System):
- type = 'MipsSystem'
- cxx_header = 'arch/mips/system.hh'
- console = Param.String("file that contains the console code")
- bare_iron = Param.Bool(False, "Using Bare Iron Mode?")
- hex_file_name = Param.String("test.hex","hex file that contains [address,data] pairs")
- system_type = Param.UInt64("Type of system we are emulating")
- system_rev = Param.UInt64("Revision of system we are emulating")
-
-class LinuxMipsSystem(MipsSystem):
- type = 'LinuxMipsSystem'
- cxx_header = 'arch/mips/linux/system.hh'
- system_type = 34
- system_rev = 1 << 10
-
- boot_cpu_frequency = Param.Frequency(Self.cpu[0].clk_domain.clock[0]
- .frequency,
- "boot processor frequency")
-
-class BareIronMipsSystem(MipsSystem):
- type = 'BareIronMipsSystem'
- cxx_header = 'arch/mips/bare_iron/system.hh'
- bare_iron = True
- system_type = 34
- system_rev = 1 << 10
- hex_file_name = Param.String('test.hex',"hex file that contains [address,data] pairs")
-
Import('*')
if env['TARGET_ISA'] == 'mips':
- Source('bare_iron/system.cc')
Source('decoder.cc')
Source('dsp.cc')
Source('faults.cc')
Source('isa.cc')
Source('linux/linux.cc')
Source('linux/process.cc')
- Source('linux/system.cc')
Source('pagetable.cc')
Source('process.cc')
Source('remote_gdb.cc')
Source('stacktrace.cc')
- Source('system.cc')
Source('tlb.cc')
Source('utility.cc')
SimObject('MipsInterrupts.py')
SimObject('MipsISA.py')
- SimObject('MipsSystem.py')
SimObject('MipsTLB.py')
DebugFlag('MipsPRA')
+++ /dev/null
-/*
- * Copyright (c) 2007 MIPS Technologies, Inc.
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions are
- * met: redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer;
- * redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in the
- * documentation and/or other materials provided with the distribution;
- * neither the name of the copyright holders nor the names of its
- * contributors may be used to endorse or promote products derived from
- * this software without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
- * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
- * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
- * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
- * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
- * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
- * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
- * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
- * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
- * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
- * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
- */
-
-#include "arch/mips/bare_iron/system.hh"
-
-#include "params/BareIronMipsSystem.hh"
-
-BareIronMipsSystem::BareIronMipsSystem(Params *p)
- : MipsSystem(p)
-{ }
-
-BareIronMipsSystem::~BareIronMipsSystem()
-{ }
-
-BareIronMipsSystem *
-BareIronMipsSystemParams::create()
-{
- return new BareIronMipsSystem(this);
-}
-
+++ /dev/null
-/*
- * Copyright (c) 2007 MIPS Technologies, Inc.
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions are
- * met: redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer;
- * redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in the
- * documentation and/or other materials provided with the distribution;
- * neither the name of the copyright holders nor the names of its
- * contributors may be used to endorse or promote products derived from
- * this software without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
- * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
- * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
- * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
- * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
- * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
- * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
- * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
- * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
- * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
- * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
- */
-
-#ifndef __ARCH_MIPS_BARE_IRON_SYSTEM_HH__
-#define __ARCH_MIPS_BARE_IRON_SYSTEM_HH__
-
-#include "arch/mips/system.hh"
-#include "params/BareIronMipsSystem.hh"
-
-/**
- * This class contains linux specific system code (Loading, Events).
- * It points to objects that are the system binaries to load and patches them
- * appropriately to work in simulator.
- */
-class BareIronMipsSystem : public MipsSystem
-{
- public:
- static const int CommandLineSize = 256;
-
- BareIronMipsSystem(Params *p);
- ~BareIronMipsSystem();
-};
-
-#endif // __ARCH_MIPS_BARE_IRON_SYSTEM_HH__
+++ /dev/null
-/*
- * Copyright (c) 2004-2006 The Regents of The University of Michigan
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions are
- * met: redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer;
- * redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in the
- * documentation and/or other materials provided with the distribution;
- * neither the name of the copyright holders nor the names of its
- * contributors may be used to endorse or promote products derived from
- * this software without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
- * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
- * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
- * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
- * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
- * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
- * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
- * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
- * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
- * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
- * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
- */
-
-/**
- * @file
- * This code loads the linux kernel, console, pal and patches certain
- * functions. The symbol tables are loaded so that traces can show
- * the executing function and we can skip functions. Various delay
- * loops are skipped and their final values manually computed to speed
- * up boot time.
- */
-
-#include "arch/mips/linux/system.hh"
-
-#include "arch/generic/linux/threadinfo.hh"
-#include "arch/mips/idle_event.hh"
-#include "arch/mips/system.hh"
-#include "base/loader/symtab.hh"
-#include "cpu/base.hh"
-#include "cpu/thread_context.hh"
-#include "debug/Thread.hh"
-#include "dev/platform.hh"
-#include "kern/linux/events.hh"
-#include "kern/linux/printk.hh"
-#include "mem/physical.hh"
-#include "mem/port.hh"
-#include "sim/byteswap.hh"
-
-using namespace std;
-using namespace MipsISA;
-using namespace Linux;
-
-LinuxMipsSystem::LinuxMipsSystem(Params *p)
- : MipsSystem(p)
-{
-}
-
-LinuxMipsSystem::~LinuxMipsSystem()
-{
-}
-
-
-void
-LinuxMipsSystem::setDelayLoop(ThreadContext *tc)
-{
- panic("setDelayLoop not implemented.\n");
-}
-
-
-void
-LinuxMipsSystem::SkipDelayLoop::process(ThreadContext *tc)
-{
- MipsISA::SkipFunc::process(tc);
- // calculate and set loops_per_jiffy
- ((LinuxMipsSystem *)tc->getSystemPtr())->setDelayLoop(tc);
-}
-
-void
-LinuxMipsSystem::PrintThreadInfo::process(ThreadContext *tc)
-{
- Linux::ThreadInfo ti(tc);
-
- DPRINTF(Thread, "Currently Executing Thread %s, pid %d, started at: %d\n",
- ti.curTaskName(), ti.curTaskPID(), ti.curTaskStart());
-}
-
-LinuxMipsSystem *
-LinuxMipsSystemParams::create()
-{
- return new LinuxMipsSystem(this);
-}
+++ /dev/null
-/*
- * Copyright (c) 2004-2006 The Regents of The University of Michigan
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions are
- * met: redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer;
- * redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in the
- * documentation and/or other materials provided with the distribution;
- * neither the name of the copyright holders nor the names of its
- * contributors may be used to endorse or promote products derived from
- * this software without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
- * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
- * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
- * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
- * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
- * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
- * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
- * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
- * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
- * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
- * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
- */
-
-#ifndef __ARCH_MIPS_LINUX_SYSTEM_HH__
-#define __ARCH_MIPS_LINUX_SYSTEM_HH__
-
-class ThreadContext;
-
-class BreakPCEvent;
-class IdleStartEvent;
-
-#include "arch/mips/idle_event.hh"
-#include "arch/mips/system.hh"
-#include "kern/linux/events.hh"
-#include "params/LinuxMipsSystem.hh"
-
-/**
- * This class contains linux specific system code (Loading, Events).
- * It points to objects that are the system binaries to load and patches them
- * appropriately to work in simulator.
- */
-class LinuxMipsSystem : public MipsSystem
-{
- private:
- using SkipFunc = MipsISA::SkipFunc;
-
- class SkipDelayLoop : public SkipFunc
- {
- public:
- SkipDelayLoop(PCEventScope *s, const std::string &desc, Addr addr) :
- SkipFunc(s, desc, addr)
- {}
- void process(ThreadContext *tc) override;
- };
-
- class PrintThreadInfo : public PCEvent
- {
- public:
- PrintThreadInfo(PCEventScope *s, const std::string &desc, Addr addr) :
- PCEvent(s, desc, addr)
- {}
- void process(ThreadContext *tc) override;
- };
-
-
- /**
- * Addresses defining where the kernel bootloader places various
- * elements. Details found in include/asm-mips/system.h
- */
- Addr KernelStart; // Lookup the symbol swapper_pg_dir
-
- public:
- Addr InitStack() const { return KernelStart + 0x02000; }
- Addr EmptyPGT() const { return KernelStart + 0x04000; }
- Addr EmptyPGE() const { return KernelStart + 0x08000; }
- Addr ZeroPGE() const { return KernelStart + 0x0A000; }
- Addr StartAddr() const { return KernelStart + 0x10000; }
-
- Addr Param() const { return ZeroPGE() + 0x0; }
- Addr CommandLine() const { return Param() + 0x0; }
- Addr InitrdStart() const { return Param() + 0x100; }
- Addr InitrdSize() const { return Param() + 0x108; }
- static const int CommandLineSize = 256;
-
- public:
- typedef LinuxMipsSystemParams Params;
- LinuxMipsSystem(Params *p);
- ~LinuxMipsSystem();
-
- void setDelayLoop(ThreadContext *tc);
-};
-
-#endif // __ARCH_MIPS_LINUX_SYSTEM_HH__
+++ /dev/null
-/*
- * Copyright (c) 2002-2005 The Regents of The University of Michigan
- * Copyright (c) 2007 MIPS Technologies, Inc.
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions are
- * met: redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer;
- * redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in the
- * documentation and/or other materials provided with the distribution;
- * neither the name of the copyright holders nor the names of its
- * contributors may be used to endorse or promote products derived from
- * this software without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
- * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
- * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
- * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
- * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
- * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
- * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
- * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
- * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
- * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
- * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
- */
-
-#include "arch/mips/system.hh"
-
-#include "arch/mips/registers.hh"
-#include "base/loader/object_file.hh"
-#include "base/loader/symtab.hh"
-#include "base/trace.hh"
-#include "mem/physical.hh"
-#include "params/MipsSystem.hh"
-#include "sim/byteswap.hh"
-
-void
-MipsISA::SkipFunc::returnFromFuncIn(ThreadContext *tc)
-{
- MipsISA::PCState newPC = tc->pcState();
- newPC.set(tc->readIntReg(MipsISA::ReturnAddressReg));
- tc->pcState(newPC);
-}
-
-MipsSystem::MipsSystem(Params *p) : System(p)
-{
-}
-
-MipsSystem::~MipsSystem()
-{
-}
-
-Addr
-MipsSystem::fixFuncEventAddr(Addr addr)
-{
- return addr;
-}
-
-void
-MipsSystem::setMipsAccess(Addr access)
-{}
-
-bool
-MipsSystem::breakpoint()
-{
- return 0;
-}
-
-MipsSystem *
-MipsSystemParams::create()
-{
- return new MipsSystem(this);
-}
-
+++ /dev/null
-/*
- * Copyright (c) 2002-2005 The Regents of The University of Michigan
- * Copyright (c) 2007 MIPS Technologies, Inc.
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions are
- * met: redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer;
- * redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in the
- * documentation and/or other materials provided with the distribution;
- * neither the name of the copyright holders nor the names of its
- * contributors may be used to endorse or promote products derived from
- * this software without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
- * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
- * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
- * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
- * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
- * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
- * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
- * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
- * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
- * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
- * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
- */
-
-#ifndef __ARCH_MIPS_SYSTEM_HH__
-#define __ARCH_MIPS_SYSTEM_HH__
-
-#include <string>
-#include <vector>
-
-#include "base/loader/symtab.hh"
-#include "cpu/pc_event.hh"
-#include "kern/system_events.hh"
-#include "params/MipsSystem.hh"
-#include "sim/sim_object.hh"
-#include "sim/system.hh"
-
-
-namespace MipsISA
-{
-
-class SkipFunc : public SkipFuncBase
-{
- public:
- using SkipFuncBase::SkipFuncBase;
-
- void returnFromFuncIn(ThreadContext *tc) override;
-};
-
-} // namespace MipsaISA
-
-class MipsSystem : public System
-{
- public:
- typedef MipsSystemParams Params;
- MipsSystem(Params *p);
- ~MipsSystem();
-
- virtual bool breakpoint();
-
- public:
-
- /**
- * Set the m5MipsAccess pointer in the console
- */
- void setMipsAccess(Addr access);
-
- /** console symbol table */
- SymbolTable *consoleSymtab;
-
- /** Object pointer for the console code */
- ObjectFile *console;
-
- protected:
- const Params *params() const { return (const Params *)_params; }
-
- virtual Addr fixFuncEventAddr(Addr addr);
-
-};
-
-#endif
-
+++ /dev/null
-# -*- mode:python -*-
-
-# Copyright (c) 2016 RISC-V Foundation
-# Copyright (c) 2016 The University of Virginia
-# All rights reserved.
-#
-# Redistribution and use in source and binary forms, with or without
-# modification, are permitted provided that the following conditions are
-# met: redistributions of source code must retain the above copyright
-# notice, this list of conditions and the following disclaimer;
-# redistributions in binary form must reproduce the above copyright
-# notice, this list of conditions and the following disclaimer in the
-# documentation and/or other materials provided with the distribution;
-# neither the name of the copyright holders nor the names of its
-# contributors may be used to endorse or promote products derived from
-# this software without specific prior written permission.
-#
-# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
-# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
-# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
-# A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
-# OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
-# SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
-# LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
-# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
-# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
-# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
-# OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-
-from m5.params import *
-
-from m5.objects.System import System
-
-class RiscvSystem(System):
- type = 'RiscvSystem'
- cxx_header = 'arch/riscv/system.hh'
Source('remote_gdb.cc')
Source('stacktrace.cc')
Source('tlb.cc')
- Source('system.cc')
Source('linux/process.cc')
Source('linux/linux.cc')
SimObject('RiscvInterrupts.py')
SimObject('RiscvISA.py')
SimObject('RiscvTLB.py')
- SimObject('RiscvSystem.py')
DebugFlag('RiscvMisc')
DebugFlag('RiscvTLB')
+++ /dev/null
-/*
- * Copyright (c) 2002-2005 The Regents of The University of Michigan
- * Copyright (c) 2007 MIPS Technologies, Inc.
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions are
- * met: redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer;
- * redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in the
- * documentation and/or other materials provided with the distribution;
- * neither the name of the copyright holders nor the names of its
- * contributors may be used to endorse or promote products derived from
- * this software without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
- * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
- * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
- * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
- * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
- * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
- * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
- * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
- * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
- * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
- * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
- */
-
-#include "arch/riscv/system.hh"
-
-#include "params/RiscvSystem.hh"
-
-RiscvSystem *
-RiscvSystemParams::create()
-{
- return new RiscvSystem(this);
-}
-
+++ /dev/null
-/*
- * Copyright (c) 2002-2005 The Regents of The University of Michigan
- * Copyright (c) 2007 MIPS Technologies, Inc.
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions are
- * met: redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer;
- * redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in the
- * documentation and/or other materials provided with the distribution;
- * neither the name of the copyright holders nor the names of its
- * contributors may be used to endorse or promote products derived from
- * this software without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
- * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
- * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
- * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
- * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
- * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
- * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
- * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
- * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
- * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
- * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
- */
-
-#ifndef __ARCH_RISCV_SYSTEM_HH__
-#define __ARCH_RISCV_SYSTEM_HH__
-
-#include "sim/system.hh"
-
-class RiscvSystem : public System
-{
- public:
- using System::System;
- Addr fixFuncEventAddr(Addr addr) override { return addr; }
-};
-
-#endif
-
#include "arch/riscv/fs_workload.hh"
#include "arch/riscv/pagetable.hh"
#include "arch/riscv/pra_constants.hh"
-#include "arch/riscv/system.hh"
#include "arch/riscv/utility.hh"
#include "base/inifile.hh"
#include "base/str.hh"
#include "params/RiscvTLB.hh"
#include "sim/full_system.hh"
#include "sim/process.hh"
+#include "sim/system.hh"
using namespace std;
using namespace RiscvISA;
Source('remote_gdb.cc')
Source('solaris/process.cc')
Source('solaris/solaris.cc')
- Source('system.cc')
Source('tlb.cc')
Source('ua2005.cc')
Source('utility.cc')
SimObject('SparcInterrupts.py')
SimObject('SparcISA.py')
SimObject('SparcNativeTrace.py')
- SimObject('SparcSystem.py')
SimObject('SparcTLB.py')
DebugFlag('Sparc', "Generic SPARC ISA stuff")
+++ /dev/null
-# Copyright (c) 2007 The Regents of The University of Michigan
-# All rights reserved.
-#
-# Redistribution and use in source and binary forms, with or without
-# modification, are permitted provided that the following conditions are
-# met: redistributions of source code must retain the above copyright
-# notice, this list of conditions and the following disclaimer;
-# redistributions in binary form must reproduce the above copyright
-# notice, this list of conditions and the following disclaimer in the
-# documentation and/or other materials provided with the distribution;
-# neither the name of the copyright holders nor the names of its
-# contributors may be used to endorse or promote products derived from
-# this software without specific prior written permission.
-#
-# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
-# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
-# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
-# A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
-# OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
-# SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
-# LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
-# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
-# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
-# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
-# OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-
-from m5.params import *
-
-from m5.objects.System import System
-
-class SparcSystem(System):
- type = 'SparcSystem'
- cxx_header = 'arch/sparc/system.hh'
+++ /dev/null
-/*
- * Copyright (c) 2002-2006 The Regents of The University of Michigan
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions are
- * met: redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer;
- * redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in the
- * documentation and/or other materials provided with the distribution;
- * neither the name of the copyright holders nor the names of its
- * contributors may be used to endorse or promote products derived from
- * this software without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
- * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
- * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
- * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
- * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
- * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
- * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
- * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
- * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
- * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
- * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
- */
-
-#include "arch/sparc/system.hh"
-
-#include "params/SparcSystem.hh"
-
-SparcSystem *
-SparcSystemParams::create()
-{
- return new SparcSystem(this);
-}
+++ /dev/null
-/*
- * Copyright (c) 2002-2005 The Regents of The University of Michigan
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions are
- * met: redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer;
- * redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in the
- * documentation and/or other materials provided with the distribution;
- * neither the name of the copyright holders nor the names of its
- * contributors may be used to endorse or promote products derived from
- * this software without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
- * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
- * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
- * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
- * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
- * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
- * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
- * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
- * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
- * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
- * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
- */
-
-#ifndef __ARCH_SPARC_SYSTEM_HH__
-#define __ARCH_SPARC_SYSTEM_HH__
-
-#include "sim/system.hh"
-
-class SparcSystem : public System
-{
- public:
- using System::System;
-
- Addr fixFuncEventAddr(Addr addr) override { return addr; }
-};
-
-#endif
-
Source('pseudo_inst.cc')
Source('remote_gdb.cc')
Source('stacktrace.cc')
- Source('system.cc')
Source('tlb.cc')
Source('types.cc')
Source('utility.cc')
SimObject('X86ISA.py')
SimObject('X86LocalApic.py')
SimObject('X86NativeTrace.py')
- SimObject('X86System.py')
SimObject('X86TLB.py')
DebugFlag('Faults', "Trace all faults/exceptions/traps")
+++ /dev/null
-# Copyright (c) 2007-2008 The Hewlett-Packard Development Company
-# All rights reserved.
-#
-# The license below extends only to copyright in the software and shall
-# not be construed as granting a license to any other intellectual
-# property including but not limited to intellectual property relating
-# to a hardware implementation of the functionality of the software
-# licensed hereunder. You may use the software subject to the license
-# terms below provided that you ensure that this notice is replicated
-# unmodified and in its entirety in all distributions of the software,
-# modified or unmodified, in source code or in binary form.
-#
-# Redistribution and use in source and binary forms, with or without
-# modification, are permitted provided that the following conditions are
-# met: redistributions of source code must retain the above copyright
-# notice, this list of conditions and the following disclaimer;
-# redistributions in binary form must reproduce the above copyright
-# notice, this list of conditions and the following disclaimer in the
-# documentation and/or other materials provided with the distribution;
-# neither the name of the copyright holders nor the names of its
-# contributors may be used to endorse or promote products derived from
-# this software without specific prior written permission.
-#
-# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
-# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
-# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
-# A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
-# OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
-# SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
-# LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
-# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
-# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
-# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
-# OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-
-from m5.objects.System import System
-
-class X86System(System):
- type = 'X86System'
- cxx_header = 'arch/x86/system.hh'
#include <string>
#include <vector>
+#include "arch/x86/isa_traits.hh"
#include "base/bitunion.hh"
#include "base/types.hh"
#include "base/trie.hh"
-#include "arch/x86/system.hh"
#include "debug/MMU.hh"
+#include "mem/port_proxy.hh"
class Checkpoint;
class ThreadContext;
#include "arch/x86/isa_traits.hh"
#include "arch/x86/regs/misc.hh"
#include "arch/x86/regs/segment.hh"
-#include "arch/x86/system.hh"
#include "arch/x86/types.hh"
#include "base/loader/elf_object.hh"
#include "base/loader/object_file.hh"
+++ /dev/null
-/*
- * Copyright (c) 2007 The Hewlett-Packard Development Company
- * Copyright (c) 2018 TU Dresden
- * All rights reserved.
- *
- * The license below extends only to copyright in the software and shall
- * not be construed as granting a license to any other intellectual
- * property including but not limited to intellectual property relating
- * to a hardware implementation of the functionality of the software
- * licensed hereunder. You may use the software subject to the license
- * terms below provided that you ensure that this notice is replicated
- * unmodified and in its entirety in all distributions of the software,
- * modified or unmodified, in source code or in binary form.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions are
- * met: redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer;
- * redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in the
- * documentation and/or other materials provided with the distribution;
- * neither the name of the copyright holders nor the names of its
- * contributors may be used to endorse or promote products derived from
- * this software without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
- * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
- * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
- * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
- * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
- * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
- * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
- * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
- * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
- * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
- * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
- */
-
-#include "arch/x86/system.hh"
-
-#include "params/X86System.hh"
-
-X86System *
-X86SystemParams::create()
-{
- return new X86System(this);
-}
+++ /dev/null
-/*
- * Copyright (c) 2007 The Hewlett-Packard Development Company
- * All rights reserved.
- *
- * The license below extends only to copyright in the software and shall
- * not be construed as granting a license to any other intellectual
- * property including but not limited to intellectual property relating
- * to a hardware implementation of the functionality of the software
- * licensed hereunder. You may use the software subject to the license
- * terms below provided that you ensure that this notice is replicated
- * unmodified and in its entirety in all distributions of the software,
- * modified or unmodified, in source code or in binary form.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions are
- * met: redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer;
- * redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in the
- * documentation and/or other materials provided with the distribution;
- * neither the name of the copyright holders nor the names of its
- * contributors may be used to endorse or promote products derived from
- * this software without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
- * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
- * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
- * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
- * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
- * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
- * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
- * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
- * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
- * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
- * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
- */
-
-#ifndef __ARCH_X86_SYSTEM_HH__
-#define __ARCH_X86_SYSTEM_HH__
-
-#include "params/X86System.hh"
-#include "sim/system.hh"
-
-class X86System : public System
-{
- public:
- using System::System;
- Addr fixFuncEventAddr(Addr addr) override { return addr; }
-};
-
-#endif // __ARCH_X86_SYSTEM_HH__
#include "base/trie.hh"
#include "mem/request.hh"
#include "params/X86TLB.hh"
+#include "sim/stats.hh"
class ThreadContext;
#include "base/types.hh"
#include "mem/page_table.hh"
-
-class System;
+#include "sim/system.hh"
/**
* This class implements an in-memory multi-level page table that can be
Source('init.cc', add_tags='python')
Source('init_signals.cc')
Source('main.cc', tags='main')
-Source('workload.cc')
Source('kernel_workload.cc')
Source('port.cc')
Source('python.cc', add_tags='python')
void workItemEnd(uint32_t tid, uint32_t workid);
- /**
- * Fix up an address used to match PCs for hooking simulator
- * events on to target function executions. See comment in
- * system.cc for details.
- */
- virtual Addr fixFuncEventAddr(Addr addr)
- {
- panic("Base fixFuncEventAddr not implemented.\n");
- }
-
public:
std::vector<BaseRemoteGDB *> remoteGDB;
bool breakpoint();
+++ /dev/null
-/*
- * Copyright 2019 Google Inc.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions are
- * met: redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer;
- * redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in the
- * documentation and/or other materials provided with the distribution;
- * neither the name of the copyright holders nor the names of its
- * contributors may be used to endorse or promote products derived from
- * this software without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
- * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
- * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
- * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
- * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
- * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
- * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
- * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
- * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
- * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
- * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
- */
-
-#include "sim/workload.hh"
-
-#include "params/Workload.hh"
-#include "sim/system.hh"
-
-Addr
-Workload::fixFuncEventAddr(Addr addr)
-{
- return system->fixFuncEventAddr(addr);
-}
class Workload : public SimObject
{
protected:
- Addr fixFuncEventAddr(Addr);
+ virtual Addr fixFuncEventAddr(Addr addr) const { return addr; }
public:
using SimObject::SimObject;
projects / gem5.git / commitdiff