-2014-11-17 Zhenqiang Chen <zhenqiang.chen@linaor.org>
+2014-11-17 Zhenqiang Chen <zhenqiang.chen@linaro.org>
+
+ * cfgexpand.c (expand_gimple_cond): Check ccmp.
+ * expmed.c (emit_cstore): Make it global.
+ * expmed.h: #include "insn-codes.h"
+ (emit_cstore): New prototype.
+ * expr.c (expand_operands): Make it global.
+ * expr.h (expand_operands): New prototype.
+ * optabs.c (get_rtx_code): Make it global.
+ * optabs.h (get_rtx_code): New prototype.
+
+2014-11-17 Zhenqiang Chen <zhenqiang.chen@linaro.org>
* target.def (gen_ccmp_first, gen_ccmp_first): Add two new hooks.
* doc/tm.texi.in (TARGET_GEN_CCMP_FIRST, TARGET_GEN_CCMP_NEXT): New.
op0 = gimple_assign_rhs1 (second);
op1 = gimple_assign_rhs2 (second);
}
- /* If jumps are cheap turn some more codes into
- jumpy sequences. */
- else if (BRANCH_COST (optimize_insn_for_speed_p (), false) < 4)
+ /* If jumps are cheap and the target does not support conditional
+ compare, turn some more codes into jumpy sequences. */
+ else if (BRANCH_COST (optimize_insn_for_speed_p (), false) < 4
+ && targetm.gen_ccmp_first == NULL)
{
if ((code2 == BIT_AND_EXPR
&& TYPE_PRECISION (TREE_TYPE (op0)) == 1
}
/* Helper function for emit_store_flag. */
-static rtx
+rtx
emit_cstore (rtx target, enum insn_code icode, enum rtx_code code,
machine_mode mode, machine_mode compare_mode,
int unsignedp, rtx x, rtx y, int normalizep,
#ifndef EXPMED_H
#define EXPMED_H 1
+#include "insn-codes.h"
+
enum alg_code {
alg_unknown,
alg_zero,
}
extern int mult_by_coeff_cost (HOST_WIDE_INT, machine_mode, bool);
+extern rtx emit_cstore (rtx target, enum insn_code icode, enum rtx_code code,
+ enum machine_mode mode, enum machine_mode compare_mode,
+ int unsignedp, rtx x, rtx y, int normalizep,
+ enum machine_mode target_mode);
#endif
static unsigned HOST_WIDE_INT highest_pow2_factor_for_target (const_tree, const_tree);
static int is_aligning_offset (const_tree, const_tree);
-static void expand_operands (tree, tree, rtx, rtx*, rtx*,
- enum expand_modifier);
static rtx reduce_to_bit_field_precision (rtx, rtx, tree);
static rtx do_store_flag (sepops, rtx, machine_mode);
#ifdef PUSH_ROUNDING
The value may be stored in TARGET if TARGET is nonzero. The
MODIFIER argument is as documented by expand_expr. */
-static void
+void
expand_operands (tree exp0, tree exp1, rtx target, rtx *op0, rtx *op1,
enum expand_modifier modifier)
{
by EXP. This does not include any offset in DECL_FIELD_BIT_OFFSET. */
extern tree component_ref_field_offset (tree);
+extern void expand_operands (tree, tree, rtx, rtx*, rtx*,
+ enum expand_modifier);
#endif /* GCC_EXPR_H */
/* Return rtx code for TCODE. Use UNSIGNEDP to select signed
or unsigned operation code. */
-static enum rtx_code
+enum rtx_code
get_rtx_code (enum tree_code tcode, bool unsignedp)
{
enum rtx_code code;
code = LTGT;
break;
+ case BIT_AND_EXPR:
+ code = AND;
+ break;
+
+ case BIT_IOR_EXPR:
+ code = IOR;
+ break;
+
default:
gcc_unreachable ();
}
extern bool lshift_cheap_p (bool);
+extern enum rtx_code get_rtx_code (enum tree_code tcode, bool unsignedp);
+
#endif /* GCC_OPTABS_H */