unsigned sx_blend_opt_control = 0;
for (i = 0; i < sctx->framebuffer.state.nr_cbufs; i++) {
- struct r600_surface *surf =
- (struct r600_surface*)sctx->framebuffer.state.cbufs[i];
+ struct si_surface *surf =
+ (struct si_surface*)sctx->framebuffer.state.cbufs[i];
unsigned format, swap, spi_format, colormask;
bool has_alpha, has_rgb;
* framebuffer handling
*/
-static void si_choose_spi_color_formats(struct r600_surface *surf,
+static void si_choose_spi_color_formats(struct si_surface *surf,
unsigned format, unsigned swap,
unsigned ntype, bool is_depth)
{
}
static void si_initialize_color_surface(struct si_context *sctx,
- struct r600_surface *surf)
+ struct si_surface *surf)
{
struct si_texture *tex = (struct si_texture*)surf->base.texture;
unsigned color_info, color_attrib;
}
static void si_init_depth_surface(struct si_context *sctx,
- struct r600_surface *surf)
+ struct si_surface *surf)
{
struct si_texture *tex = (struct si_texture*)surf->base.texture;
unsigned level = surf->base.u.tex.level;
static void si_dec_framebuffer_counters(const struct pipe_framebuffer_state *state)
{
for (int i = 0; i < state->nr_cbufs; ++i) {
- struct r600_surface *surf = NULL;
+ struct si_surface *surf = NULL;
struct si_texture *tex;
if (!state->cbufs[i])
continue;
- surf = (struct r600_surface*)state->cbufs[i];
+ surf = (struct si_surface*)state->cbufs[i];
tex = (struct si_texture*)surf->base.texture;
p_atomic_dec(&tex->framebuffers_bound);
{
struct si_context *sctx = (struct si_context *)ctx;
struct pipe_constant_buffer constbuf = {0};
- struct r600_surface *surf = NULL;
+ struct si_surface *surf = NULL;
struct si_texture *tex;
bool old_any_dst_linear = sctx->framebuffer.any_dst_linear;
unsigned old_nr_samples = sctx->framebuffer.nr_samples;
if (!state->cbufs[i])
continue;
- surf = (struct r600_surface*)state->cbufs[i];
+ surf = (struct si_surface*)state->cbufs[i];
tex = (struct si_texture*)surf->base.texture;
if (!surf->dcc_incompatible)
if (!state->cbufs[i])
continue;
- surf = (struct r600_surface*)state->cbufs[i];
+ surf = (struct si_surface*)state->cbufs[i];
tex = (struct si_texture*)surf->base.texture;
if (!surf->color_initialized) {
struct si_texture *zstex = NULL;
if (state->zsbuf) {
- surf = (struct r600_surface*)state->zsbuf;
+ surf = (struct si_surface*)state->zsbuf;
zstex = (struct si_texture*)surf->base.texture;
if (!surf->depth_initialized) {
struct pipe_framebuffer_state *state = &sctx->framebuffer.state;
unsigned i, nr_cbufs = state->nr_cbufs;
struct si_texture *tex = NULL;
- struct r600_surface *cb = NULL;
+ struct si_surface *cb = NULL;
unsigned cb_color_info = 0;
/* Colorbuffers. */
if (!(sctx->framebuffer.dirty_cbufs & (1 << i)))
continue;
- cb = (struct r600_surface*)state->cbufs[i];
+ cb = (struct si_surface*)state->cbufs[i];
if (!cb) {
radeon_set_context_reg(cs, R_028C70_CB_COLOR0_INFO + i * 0x3C,
S_028C70_FORMAT(V_028C70_COLOR_INVALID));
/* ZS buffer. */
if (state->zsbuf && sctx->framebuffer.dirty_zsbuf) {
- struct r600_surface *zb = (struct r600_surface*)state->zsbuf;
+ struct si_surface *zb = (struct si_surface*)state->zsbuf;
struct si_texture *tex = (struct si_texture*)zb->base.texture;
radeon_add_to_buffer_list(sctx, sctx->gfx_cs,