Re: [libre-riscv-dev] LibreSOC - RISCV and POWER dual architecture feasibility
authorJacob Lifshay <programmerjake@gmail.com>
Mon, 16 Mar 2020 07:28:11 +0000 (00:28 -0700)
committerlibre-riscv-dev <libre-riscv-dev@lists.libre-riscv.org>
Mon, 16 Mar 2020 07:28:24 +0000 (07:28 +0000)
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+In-Reply-To: <20200316091420.15087a26fab1be3d5fc23953@gmx.com>
+From: Jacob Lifshay <programmerjake@gmail.com>
+Date: Mon, 16 Mar 2020 00:28:11 -0700
+Message-ID: <CAC2bXD6_-zS+AutnriuOPnnJ3sqN1vM=Z94J+mWMqpwrhVCY+w@mail.gmail.com>
+To: Lauri Kasanen <cand@gmx.com>
+X-Content-Filtered-By: Mailman/MimeDel 2.1.23
+Subject: Re: [libre-riscv-dev] LibreSOC - RISCV and POWER dual architecture
+ feasibility
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