* bfd/bfd-in2.h (bfd_elf32_arm_set_target_relocs): Likewise.
* bfd/elf32-arm.c (elf32_arm_link_hash_table): New field.
(elf232_arm_link_hash_table_create): Initialise new field.
(check_use_blx): Change test depending on fix_arm1176.
(bfd_elf32_arm_set_target_relocs): Set fix_arm1176 from
command line options.
* ld/emultempl/armelf.em (fix_arm1176): New variable.
(arm_elf_create_output_section_statements): Pass
fix_arm1176 option to bfd backend.
(OPTION_FIX_ARM1176): New define.
(OPTION_NO_FIX_ARM1176): Likewise.
(PARSE_AND_LIST_LONGOPTS): Add new command line options.
(PARSE_AND_LIST_OPTIONS): Likewise.
(PARSE_AND_LIST_ARGS_CASES): Likewise.
* ld/ld.texinfo: Document new command line options.
* ld/testsuite/ld-arm/arm-elf.exp (armelftests): Update for new command-line
options.
(armeabitests): Update for new command-line options, and add
new test cases.
* ld/testsuite/ld-arm/fix-arm1176.s: Add test case.
* ld/testsuite/ld-arm/fix-arm1176-off.d: Likewise.
* ld/testsuite/ld-arm/fix-arm1176-on.d: Likewise.
+2011-08-09 Matthew Gretton-Dann <matthew.gretton-dann@arm.com>
+
+ * bfd-in.h (bfd_elf32_arm_set_target_relocs): Update prototype.
+ * bfd-in2.h (bfd_elf32_arm_set_target_relocs): Likewise.
+ * elf32-arm.c (elf32_arm_link_hash_table): New field.
+ (elf232_arm_link_hash_table_create): Initialise new field.
+ (check_use_blx): Change test depending on fix_arm1176.
+ (bfd_elf32_arm_set_target_relocs): Set fix_arm1176 from
+ command line options.
+
2011-08-08 Tristan Gingold <gingold@adacore.com>
* mach-o.c (struct mach_o_segment_name_xlat): Add comments.
void bfd_elf32_arm_set_target_relocs
(bfd *, struct bfd_link_info *, int, char *, int, int, bfd_arm_vfp11_fix,
- int, int, int, int);
+ int, int, int, int, int);
extern bfd_boolean bfd_elf32_arm_get_bfd_for_interworking
(bfd *, struct bfd_link_info *);
void bfd_elf32_arm_set_target_relocs
(bfd *, struct bfd_link_info *, int, char *, int, int, bfd_arm_vfp11_fix,
- int, int, int, int);
+ int, int, int, int, int);
extern bfd_boolean bfd_elf32_arm_get_bfd_for_interworking
(bfd *, struct bfd_link_info *);
/* Whether we should fix the Cortex-A8 Thumb-2 branch/TLB erratum. */
int fix_cortex_a8;
+ /* Whether we should fix the ARM1176 BLX immediate issue. */
+ int fix_arm1176;
+
/* Nonzero if the ARM/Thumb BLX instructions are available for use. */
int use_blx;
ret->vfp11_erratum_glue_size = 0;
ret->num_vfp11_fixes = 0;
ret->fix_cortex_a8 = 0;
+ ret->fix_arm1176 = 0;
ret->bfd_of_glue_owner = NULL;
ret->byteswap_code = 0;
ret->target1_is_rel = 0;
static void
check_use_blx (struct elf32_arm_link_hash_table *globals)
{
- if (bfd_elf_get_obj_attr_int (globals->obfd, OBJ_ATTR_PROC,
- Tag_CPU_arch) > 2)
- globals->use_blx = 1;
+ int cpu_arch;
+
+ cpu_arch = bfd_elf_get_obj_attr_int (globals->obfd, OBJ_ATTR_PROC,
+ Tag_CPU_arch);
+
+ if (globals->fix_arm1176)
+ {
+ if (cpu_arch == TAG_CPU_ARCH_V6T2 || cpu_arch > TAG_CPU_ARCH_V6K)
+ globals->use_blx = 1;
+ }
+ else
+ {
+ if (cpu_arch > TAG_CPU_ARCH_V4T)
+ globals->use_blx = 1;
+ }
}
bfd_boolean
int use_blx,
bfd_arm_vfp11_fix vfp11_fix,
int no_enum_warn, int no_wchar_warn,
- int pic_veneer, int fix_cortex_a8)
+ int pic_veneer, int fix_cortex_a8,
+ int fix_arm1176)
{
struct elf32_arm_link_hash_table *globals;
globals->vfp11_fix = vfp11_fix;
globals->pic_veneer = pic_veneer;
globals->fix_cortex_a8 = fix_cortex_a8;
+ globals->fix_arm1176 = fix_arm1176;
BFD_ASSERT (is_arm_elf (output_bfd));
elf_arm_tdata (output_bfd)->no_enum_size_warning = no_enum_warn;
+2011-08-09 Matthew Gretton-Dann <matthew.gretton-dann@arm.com>
+
+ * emultempl/armelf.em (fix_arm1176): New variable.
+ (arm_elf_create_output_section_statements): Pass
+ fix_arm1176 option to bfd backend.
+ (OPTION_FIX_ARM1176): New define.
+ (OPTION_NO_FIX_ARM1176): Likewise.
+ (PARSE_AND_LIST_LONGOPTS): Add new command line options.
+ (PARSE_AND_LIST_OPTIONS): Likewise.
+ (PARSE_AND_LIST_ARGS_CASES): Likewise.
+ * ld.texinfo: Document new command line options.
+
2011-08-09 Alan Modra <amodra@gmail.com>
PR ld/13066
static int no_wchar_size_warning = 0;
static int pic_veneer = 0;
static int merge_exidx_entries = -1;
+static int fix_arm1176 = 1;
static void
gld${EMULATION_NAME}_before_parse (void)
target2_type, fix_v4bx, use_blx,
vfp11_denorm_fix, no_enum_size_warning,
no_wchar_size_warning,
- pic_veneer, fix_cortex_a8);
+ pic_veneer, fix_cortex_a8,
+ fix_arm1176);
stub_file = lang_add_input_file ("linker stubs",
lang_input_file_is_fake_enum,
#define OPTION_FIX_CORTEX_A8 314
#define OPTION_NO_FIX_CORTEX_A8 315
#define OPTION_NO_MERGE_EXIDX_ENTRIES 316
+#define OPTION_FIX_ARM1176 317
+#define OPTION_NO_FIX_ARM1176 318
'
PARSE_AND_LIST_SHORTOPTS=p
{ "fix-cortex-a8", no_argument, NULL, OPTION_FIX_CORTEX_A8 },
{ "no-fix-cortex-a8", no_argument, NULL, OPTION_NO_FIX_CORTEX_A8 },
{ "no-merge-exidx-entries", no_argument, NULL, OPTION_NO_MERGE_EXIDX_ENTRIES },
+ { "fix-arm1176", no_argument, NULL, OPTION_FIX_ARM1176 },
+ { "no-fix-arm1176", no_argument, NULL, OPTION_NO_FIX_ARM1176 },
'
PARSE_AND_LIST_OPTIONS='
));
fprintf (file, _(" --[no-]fix-cortex-a8 Disable/enable Cortex-A8 Thumb-2 branch erratum fix\n"));
fprintf (file, _(" --no-merge-exidx-entries Disable merging exidx entries\n"));
-
+ fprintf (file, _(" --[no-]fix-arm1176 Disable/enable ARM1176 BLX immediate erratum fix\n"));
'
PARSE_AND_LIST_ARGS_CASES='
case OPTION_NO_MERGE_EXIDX_ENTRIES:
merge_exidx_entries = 0;
+ break;
+ case OPTION_FIX_ARM1176:
+ fix_arm1176 = 1;
+ break;
+
+ case OPTION_NO_FIX_ARM1176:
+ fix_arm1176 = 0;
+ break;
'
# We have our own before_allocation etc. functions, but they call
the veneer. The extra cycles required to call and return from the veneer
are sufficient to avoid the erratum in both the scalar and vector cases.
+@cindex ARM1176 erratum workaround
+@kindex --fix-arm1176
+@kindex --no-fix-arm1176
+The @samp{--fix-arm1176} switch enables a link-time workaround for an erratum
+in certain ARM1176 processors. The workaround is enabled by default if you
+are targetting ARM v6 (excluding ARM v6T2) or earlier. It can be disabled
+unconditionally by specifying @samp{--no-fix-arm1176}.
+
+Further information is available in the ``ARM1176JZ-S and ARM1176JZF-S
+Programmer Advice Notice'' available on the ARM documentaion website at:
+http://infocenter.arm.com/.
+
@cindex NO_ENUM_SIZE_WARNING
@kindex --no-enum-size-warning
The @option{--no-enum-size-warning} switch prevents the linker from
+2011-08-09 Matthew Gretton-Dann <matthew.gretton-dann@arm.com>
+
+ * ld-arm/arm-elf.exp (armelftests): Update for new command-line
+ options.
+ (armeabitests): Update for new command-line options, and add
+ new test cases.
+ * ld-arm/fix-arm1176.s: Add test case.
+ * ld-arm/fix-arm1176-off.d: Likewise.
+ * ld-arm/fix-arm1176-on.d: Likewise.
+
2011-08-05 Alan Modra <amodra@gmail.com>
* ld-powerpc/tlsexe.r: Update for stripped .branch_lt.
{"arm-rel32" "-shared -T arm-dyn.ld" "" {arm-rel32.s}
{{objdump -Rsj.data arm-rel32.d}}
"arm-rel32"}
- {"arm-call" "-static -T arm.ld" "-meabi=4" {arm-call1.s arm-call2.s}
+ {"arm-call" "--no-fix-arm1176 -static -T arm.ld" "-meabi=4" {arm-call1.s arm-call2.s}
{{objdump -d arm-call.d}}
"arm-call"}
{"TLS shared library" "-shared -T arm-lib.ld" "" {tls-lib.s}
{"TLS gnu shared library got" "-shared -T arm-dyn.ld" "" {tls-gdesc-got.s}
{{objdump "-fDR -j .got" tls-gdesc-got.d}}
"tls-lib2-got.so"}
- {"TLS gnu shared library inlined trampoline" "-shared -T arm-dyn.ld" "" {tls-descseq.s}
+ {"TLS gnu shared library inlined trampoline" "--no-fix-arm1176 -shared -T arm-dyn.ld" "" {tls-descseq.s}
{{objdump -fdw tls-descseq.d} {objdump -Rw tls-descseq.r}}
"tls-lib2inline.so"}
- {"TLS shared library gdesc local" "-shared -T arm-dyn.ld" "" {tls-lib-loc.s}
+ {"TLS shared library gdesc local" "--no-fix-arm1176 -shared -T arm-dyn.ld" "" {tls-lib-loc.s}
{{objdump -fdw tls-lib-loc.d} {objdump -Rw tls-lib-loc.r}}
"tls-lib-loc.so"}
{"TLS gnu GD to IE relaxation" "-static -T arm-dyn.ld" "" {tls-gdierelax.s}
{{objdump -fdw tls-gdierelax.d}}
"tls-app-rel-ie"}
- {"TLS gnu GD to IE shared relaxation" "-shared -T arm-dyn.ld" "" {tls-gdierelax2.s}
+ {"TLS gnu GD to IE shared relaxation" "--no-fix-arm1176 -shared -T arm-dyn.ld" "" {tls-gdierelax2.s}
{{objdump -fdw tls-gdierelax2.d}}
"tls-app-rel-ie2"}
{"TLS gnu GD to LE relaxation" "-T arm-dyn.ld" "" {tls-gdlerelax.s}
{"MOVW/MOVT against shared libraries" "tmpdir/arm-lib.so" "" {arm-app-movw.s}
{{objdump -Rw arm-app.r}}
"arm-app-movw"}
- {"Thumb-2-as-Thumb-1 BL" "-Ttext 0x1000 --section-start .foo=0x100100c" "" {thumb2-bl-as-thumb1-bad.s}
+ {"Thumb-2-as-Thumb-1 BL" "--no-fix-arm1176 -Ttext 0x1000 --section-start .foo=0x100100c" "" {thumb2-bl-as-thumb1-bad.s}
{{objdump -d thumb2-bl-as-thumb1-bad.d}}
"thumb2-bl-as-thumb1-bad"}
{"Thumb-2 BL" "-Ttext 0x1000 --section-start .foo=0x100100c" "" {thumb2-bl-bad.s}
{"ARM-Thumb farcall" "-Ttext 0x1000 --section-start .foo=0x2001014" "" {farcall-arm-thumb.s}
{{objdump -d farcall-arm-thumb.d}}
"farcall-arm-thumb"}
- {"ARM-Thumb farcall with BLX" "-Ttext 0x1000 --section-start .foo=0x2001014" "-march=armv5t" {farcall-arm-thumb.s}
+ {"ARM-Thumb farcall with BLX" "--no-fix-arm1176 -Ttext 0x1000 --section-start .foo=0x2001014" "-march=armv5t" {farcall-arm-thumb.s}
{{objdump -d farcall-arm-thumb-blx.d}}
"farcall-arm-thumb-blx"}
{"ARM-Thumb farcall (PIC veneer)" "-Ttext 0x1000 --section-start .foo=0x2001014 --pic-veneer" "" {farcall-arm-thumb.s}
{{objdump -d farcall-arm-thumb-blx-pic-veneer.d}}
"farcall-arm-thumb-blx-pic-veneer"}
- {"Thumb-Thumb farcall with BLX" "-Ttext 0x1000 --section-start .foo=0x2001014" "-march=armv5t" {farcall-thumb-thumb.s}
+ {"Thumb-Thumb farcall with BLX" "--no-fix-arm1176 -Ttext 0x1000 --section-start .foo=0x2001014" "-march=armv5t" {farcall-thumb-thumb.s}
{{objdump -d farcall-thumb-thumb-blx.d}}
"farcall-thumb-thumb-blx"}
{"Thumb-Thumb farcall M profile" "-Ttext 0x1000 --section-start .foo=0x2001014" "-march=armv7-m" {farcall-thumb-thumb.s}
{"Thumb-Thumb farcall" "-Ttext 0x1000 --section-start .foo=0x2001014" "-march=armv4t" {farcall-thumb-thumb.s}
{{objdump -d farcall-thumb-thumb.d}}
"farcall-thumb-thumb"}
- {"Thumb-Thumb farcall with BLX (PIC veneer)" "-Ttext 0x1000 --section-start .foo=0x2001014 --pic-veneer" "-march=armv5t" {farcall-thumb-thumb.s}
+ {"Thumb-Thumb farcall with BLX (PIC veneer)" "--no-fix-arm1176 -Ttext 0x1000 --section-start .foo=0x2001014 --pic-veneer" "-march=armv5t" {farcall-thumb-thumb.s}
{{objdump -d farcall-thumb-thumb-blx-pic-veneer.d}}
"farcall-thumb-thumb-blx-pic-veneer"}
{"Thumb-Thumb farcall M profile (PIC veneer)" "-Ttext 0x1000 --section-start .foo=0x2001014 --pic-veneer" "-march=armv7-m" {farcall-thumb-thumb.s}
{"Thumb-ARM (short) call" "-Ttext 0x1000 --section-start .foo=0x0002014" "-W" {farcall-thumb-arm-short.s}
{{objdump -d farcall-thumb-arm-short.d}}
"farcall-thumb-arm-short"}
- {"Thumb-ARM farcall with BLX" "-Ttext 0x1c01010 --section-start .foo=0x2001014" "-W -march=armv5t" {farcall-thumb-arm.s}
+ {"Thumb-ARM farcall with BLX" "--no-fix-arm1176 -Ttext 0x1c01010 --section-start .foo=0x2001014" "-W -march=armv5t" {farcall-thumb-arm.s}
{{objdump -d farcall-thumb-arm-blx.d}}
"farcall-thumb-arm-blx"}
- {"Thumb-ARM farcall with BLX (PIC veneer)" "-Ttext 0x1c01010 --section-start .foo=0x2001014 --pic-veneer" "-W -march=armv5t" {farcall-thumb-arm.s}
+ {"Thumb-ARM farcall with BLX (PIC veneer)" "--no-fix-arm1176 -Ttext 0x1c01010 --section-start .foo=0x2001014 --pic-veneer" "-W -march=armv5t" {farcall-thumb-arm.s}
{{objdump -d farcall-thumb-arm-blx-pic-veneer.d}}
"farcall-thumb-arm-blx-pic-veneer"}
{"Thumb-ARM farcall (PIC veneer)" "-Ttext 0x1c01010 --section-start .foo=0x2001014 --pic-veneer" "-W" {farcall-thumb-arm.s}
{{objdump -fdw farcall-mixed-lib-v4t.d}}
"farcall-mixed-lib.so"}
- {"Mixed ARM/Thumb shared library with long branches (v5t)" "-shared -T arm-lib.ld" "-march=armv5t"
+ {"Mixed ARM/Thumb shared library with long branches (v5t)" "--no-fix-arm1176 -shared -T arm-lib.ld" "-march=armv5t"
{farcall-mixed-lib1.s farcall-mixed-lib2.s}
{{objdump -fdw farcall-mixed-lib.d}}
"farcall-mixed-lib.so"}
"farcall-data"}
{"R_ARM_THM_JUMP24 Relocation veneers: Short 1"
- "--section-start destsect=0x00009000 --section-start .text=0x8000"
+ "--no-fix-arm1176 --section-start destsect=0x00009000 --section-start .text=0x8000"
"-march=armv7-a -mthumb"
{jump-reloc-veneers.s}
{{objdump -d jump-reloc-veneers-short1.d}}
"jump-reloc-veneers-short1"}
{"R_ARM_THM_JUMP24 Relocation veneers: Short 2"
- "--section-start destsect=0x00900000 --section-start .text=0x8000"
+ "--no-fix-arm1176 --section-start destsect=0x00900000 --section-start .text=0x8000"
"-march=armv7-a -mthumb"
{jump-reloc-veneers.s}
{{objdump -d jump-reloc-veneers-short2.d}}
"jump-reloc-veneers-short2"}
{"R_ARM_THM_JUMP24 Relocation veneers: Long"
- "--section-start destsect=0x09000000 --section-start .text=0x8000"
+ "--no-fix-arm1176 --section-start destsect=0x09000000 --section-start .text=0x8000"
"-march=armv7-a -mthumb"
{jump-reloc-veneers.s}
{{objdump -d jump-reloc-veneers-long.d}}
"jump-reloc-veneers-long"}
- {"TLS gnu shared library" "-shared -T arm-dyn.ld" "" {tls-gdesc.s}
+ {"TLS gnu shared library" "--no-fix-arm1176 -shared -T arm-dyn.ld" "" {tls-gdesc.s}
{{objdump -fdw tls-gdesc.d} {objdump -Rw tls-gdesc.r}}
"tls-lib2.so"}
{"TLS gnu shared library non-lazy" "-z now -shared -T arm-dyn.ld" "" {tls-gdesc.s}
{"TLS thumb1" "-shared -T arm-dyn.ld --section-start .foo=0x4001000" "" {tls-thumb1.s}
{{objdump -fdw tls-thumb1.d}}
"tls-thumb1"}
+
+ {"erratum 760522 fix (default for v6z)" "--section-start=.foo=0x2001014"
+ "-march=armv6z" {fix-arm1176.s}
+ {{objdump -d fix-arm1176-on.d}}
+ "fix-arm1176-1"}
+ {"erratum 760522 fix (explicitly on at v6z)" "--section-start=.foo=0x2001014 --fix-arm1176"
+ "-march=armv6z" {fix-arm1176.s}
+ {{objdump -d fix-arm1176-on.d}}
+ "fix-arm1176-2"}
+ {"erratum 760522 fix (explicitly off at v6z)" "--section-start=.foo=0x2001014 --no-fix-arm1176"
+ "-march=armv6z" {fix-arm1176.s}
+ {{objdump -d fix-arm1176-off.d}}
+ "fix-arm1176-3"}
+ {"erratum 760522 fix (default for v5)" "--section-start=.foo=0x2001014 "
+ "-march=armv5te" {fix-arm1176.s}
+ {{objdump -d fix-arm1176-on.d}}
+ "fix-arm1176-4"}
+ {"erratum 760522 fix (default for v7-a)" "--section-start=.foo=0x2001014 "
+ "-march=armv7-a" {fix-arm1176.s}
+ {{objdump -d fix-arm1176-off.d}}
+ "fix-arm1176-5"}
+ {"erratum 760522 fix (default for ARM1156)" "--section-start=.foo=0x2001014 "
+ "-mcpu=arm1156t2f-s" {fix-arm1176.s}
+ {{objdump -d fix-arm1176-off.d}}
+ "fix-arm1176-6"}
}
run_ld_link_tests $armeabitests
--- /dev/null
+
+.*: file format elf32-littlearm
+
+
+Disassembly of section .foo:
+
+[0-9a-f]+ <_start>:
+ [0-9a-f]+: f000 e800 blx 2001018 <__func_to_branch_to_veneer>
+
+[0-9a-f]+ <__func_to_branch_to_veneer>:
+ [0-9a-f]+: e51ff004 ldr pc, \[pc, #-4\] ; 200101c <__func_to_branch_to_veneer\+0x4>
+ [0-9a-f]+: 00008000 .word 0x00008000
+
+Disassembly of section .text:
+
+[0-9a-f]+ <func_to_branch_to>:
+ [0-9a-f]+: e12fff1e bx lr
--- /dev/null
+
+.+: file format elf32-littlearm
+
+
+Disassembly of section .foo:
+
+[0-9a-f]+ <_start>:
+ [0-9a-f]+: f000 f800 bl 2001018 <__func_to_branch_to_veneer>
+
+[0-9a-f]+ <__func_to_branch_to_veneer>:
+ [0-9a-f]+: 4778 bx pc
+ [0-9a-f]+: 46c0 nop ; \(mov r8, r8\)
+ [0-9a-f]+: e51ff004 ldr pc, \[pc, #-4\] ; 2001020 <__func_to_branch_to_veneer\+0x8>
+ [0-9a-f]+: 00008000 .word 0x00008000
+ [0-9a-f]+: 00000000 .word 0x00000000
+
+Disassembly of section .text:
+
+[0-9a-f]+ <func_to_branch_to>:
+ [0-9a-f]+: e12fff1e bx lr
--- /dev/null
+ .syntax unified
+ .globl _start
+ .globl func_to_branch_to
+
+ .arm
+ .text
+func_to_branch_to:
+ bx lr
+
+ .thumb
+ .section .foo, "xa"
+ .thumb_func
+_start:
+ bl func_to_branch_to
+
projects / binutils-gdb.git / commitdiff