Merge zizzer.eecs.umich.edu:/bk/newmem

into  zeep.eecs.umich.edu:/home/gblack/m5/newmem_bus

src/mem/bus.cc:
    Hand merged. Needs to be fixed

--HG--
extra : convert_revision : df03219ccfd18431cc726a063bd29d30554944a1

diff --cc src/mem/bus.cc
index daca6f985aadeb8561f25c33a89276fe8ea34572,4cd4dd71a2db03f7106337f1d8cbb69f0149a061..df85ee0d95e1309fe84cb7d588f520841a32a26e
--- 1/src/mem/bus.cc
--- 2/src/mem/bus.cc
+++ b/src/mem/bus.cc
@@@ -77,32 -118,51 +118,39 @@@ Bus::recvTiming(Packet *pkt
      DPRINTF(Bus, "recvTiming: packet src %d dest %d addr 0x%x cmd %s\n",
              pkt->getSrc(), pkt->getDest(), pkt->getAddr(), pkt->cmdString());
  
 -    Port *pktPort = interfaces[pkt->getSrc()];
 -
 -    // If the bus is busy, or other devices are in line ahead of the current one,
 -    // put this device on the retry list.
 -    if (tickNextIdle > curTick || (retryList.size() && pktPort != retryingPort)) {
 -        addToRetryList(pktPort);
 -        return false;
 -    }
 -
 -    // If the bus is blocked, make the device wait.
 -    if (!(port = findDestPort(pkt, pkt->getSrc()))) {
 -        addToRetryList(pktPort);
 -        return false;
 -    }
 -
 -    // The packet will be sent. Figure out how long it occupies the bus.
 -    int numCycles = 0;
 -    // Requests need one cycle to send an address
 -    if (pkt->isRequest())
 -        numCycles++;
 -    else if (pkt->isResponse() || pkt->hasData()) {
 -        // If a packet has data, it needs ceil(size/width) cycles to send it
 -        // We're using the "adding instead of dividing" trick again here
 -        if (pkt->hasData()) {
 -            int dataSize = pkt->getSize();
 -            for (int transmitted = 0; transmitted < dataSize;
 -                    transmitted += width) {
 -                numCycles++;
 +    short dest = pkt->getDest();
 +    if (dest == Packet::Broadcast) {
++        if ( timingSnoopPhase1(pkt) )
 +        if (timingSnoop(pkt))
 +        {
++            timingSnoopPhase2(pkt);
 +            pkt->flags |= SNOOP_COMMIT;
 +            bool success = timingSnoop(pkt);
 +            assert(success);
 +            if (pkt->flags & SATISFIED) {
 +                //Cache-Cache transfer occuring
 +                return true;
              }
 -        } else {
 -            // If the packet didn't have data, it must have been a response.
 -            // Those use the bus for one cycle to send their data.
 -            numCycles++;
 +            port = findPort(pkt->getAddr(), pkt->getSrc());
          }
 +        else
 +        {
 +            //Snoop didn't succeed
 +            retryList.push_back(interfaces[pkt->getSrc()]);
 +            return false;
 +        }
 +    } else {
 +        assert(dest >= 0 && dest < interfaces.size());
 +        assert(dest != pkt->getSrc()); // catch infinite loops
 +        port = interfaces[dest];
      }
 -
 -    occupyBus(numCycles);
 -
      if (port->sendTiming(pkt))  {
-         // packet was successfully sent, just return true.
+         // Packet was successfully sent. Return true.
+         // Also take care of retries
+         if (retryingPort) {
+             retryList.pop_front();
+             retryingPort = NULL;
+         }
          return true;
      }
  

diff --cc src/mem/bus.hh
Simple merge