r300g: rename flag squaretiling -> drm_2_1_0
authorMarek Olšák <maraeo@gmail.com>
Thu, 27 Jan 2011 22:06:15 +0000 (23:06 +0100)
committerMarek Olšák <maraeo@gmail.com>
Thu, 27 Jan 2011 22:06:15 +0000 (23:06 +0100)
src/gallium/drivers/r300/r300_texture.c
src/gallium/drivers/r300/r300_texture_desc.c
src/gallium/drivers/r300/r300_winsys.h
src/gallium/winsys/radeon/drm/radeon_drm_buffer.c
src/gallium/winsys/radeon/drm/radeon_drm_common.c
src/gallium/winsys/radeon/drm/radeon_r300.c
src/gallium/winsys/radeon/drm/radeon_winsys.h

index ca2762809dd22c8545dcce0afde6a82a9ec40eed..ec8608f74bd35c18288e1ec7b31ddc651af7a263 100644 (file)
@@ -889,7 +889,7 @@ struct pipe_resource *r300_texture_from_handle(struct pipe_screen *screen,
                 break;
 
             case 2:
-                if (rws->get_value(rws, R300_VID_SQUARE_TILING_SUPPORT))
+                if (rws->get_value(rws, R300_VID_DRM_2_1_0))
                     microtile = R300_BUFFER_SQUARETILED;
                 break;
         }
index 7b1739142d49083f97f88b7734fe70feb3c21317..bc33871565ba3449ee0dc4d239ce93cdb12a4d7f 100644 (file)
@@ -361,7 +361,7 @@ static void r300_setup_tiling(struct r300_screen *screen,
             break;
 
         case 2:
-            if (rws->get_value(rws, R300_VID_SQUARE_TILING_SUPPORT)) {
+            if (rws->get_value(rws, R300_VID_DRM_2_1_0)) {
                 desc->microtile = R300_BUFFER_SQUARETILED;
             }
             break;
index 460da77a4fb1f96963a4475a12d4b220e9fbdffe..35ed35cca7cb4639e81dbcae0b16c35f2a72cd0e 100644 (file)
@@ -50,7 +50,7 @@ enum r300_value_id {
     R300_VID_PCI_ID,
     R300_VID_GB_PIPES,
     R300_VID_Z_PIPES,
-    R300_VID_SQUARE_TILING_SUPPORT,
+    R300_VID_DRM_2_1_0,  /* Square tiling. */
     R300_VID_DRM_2_3_0, /* R500 VAP regs, MSPOS regs, fixed tex3D size checking */
     R300_VID_DRM_2_6_0, /* Hyper-Z, GB_Z_PEQ_CONFIG on rv350->r4xx, R500 FG_ALPHA_VALUE */
     R300_VID_DRM_2_8_0, /* R500 US_FORMAT regs, R500 ARGB2101010 colorbuffer */
index 5e14287ec2dde15b3537968982dd6aaeb947f743..4b0f688ce9adc194742f7f3834864a07a008a326 100644 (file)
@@ -448,15 +448,18 @@ static void radeon_drm_buffer_set_tiling(struct r300_winsys_screen *ws,
                                          enum r300_buffer_tiling macrotiled,
                                          uint32_t pitch)
 {
+#ifndef RADEON_BO_FLAGS_MICRO_TILE_SQUARE
+#define RADEON_BO_FLAGS_MICRO_TILE_SQUARE 0x20
+#endif
+
     struct radeon_drm_buffer *buf = get_drm_buffer(radeon_pb_buffer(_buf));
     uint32_t flags = 0;
+
     if (microtiled == R300_BUFFER_TILED)
         flags |= RADEON_BO_FLAGS_MICRO_TILE;
-/* XXX Remove this ifdef when libdrm version 2.4.19 becomes mandatory. */
-#ifdef RADEON_BO_FLAGS_MICRO_TILE_SQUARE
     else if (microtiled == R300_BUFFER_SQUARETILED)
         flags |= RADEON_BO_FLAGS_MICRO_TILE_SQUARE;
-#endif
+
     if (macrotiled == R300_BUFFER_TILED)
         flags |= RADEON_BO_FLAGS_MACRO_TILE;
 
index fe71f0805921f19d587e8c92d701d2e5268d4a0c..3663c1fff6a29c3b09c04bbb2ec61bb539341844 100644 (file)
@@ -107,12 +107,8 @@ static void do_ioctls(struct radeon_drm_winsys *winsys)
         exit(1);
     }
 
-/* XXX Remove this ifdef when libdrm version 2.4.19 becomes mandatory. */
-#ifdef RADEON_BO_FLAGS_MICRO_TILE_SQUARE
-    // Supported since 2.1.0.
-    winsys->squaretiling = version->version_major > 2 ||
-                           version->version_minor >= 1;
-#endif
+    winsys->drm_2_1_0 = version->version_major > 2 ||
+                        version->version_minor >= 1;
 
     winsys->drm_2_3_0 = version->version_major > 2 ||
                         version->version_minor >= 3;
index bacf181b47c8df4cf0d881933c101bfdcaf06027..307ae01f5bb164777fc7a846a2c39b493fbad26c 100644 (file)
@@ -145,8 +145,8 @@ static uint32_t radeon_get_value(struct r300_winsys_screen *rws,
        return ws->gb_pipes;
     case R300_VID_Z_PIPES:
        return ws->z_pipes;
-    case R300_VID_SQUARE_TILING_SUPPORT:
-        return ws->squaretiling;
+    case R300_VID_DRM_2_1_0:
+        return ws->drm_2_1_0;
     case R300_VID_DRM_2_3_0:
         return ws->drm_2_3_0;
     case R300_VID_DRM_2_6_0:
index 492edfef8c3cde378a91e45547020d81d8f869d3..76954d5d1a86acd718a40b1947157e35dedd3366 100644 (file)
@@ -46,7 +46,7 @@ struct radeon_drm_winsys {
     uint32_t z_pipes;       /* Z pipe count (rv530 only) */
     uint32_t gart_size;     /* GART size. */
     uint32_t vram_size;     /* VRAM size. */
-    boolean squaretiling;   /* Square tiling support. */
+    boolean drm_2_1_0;      /* Square tiling support. */
     /* DRM 2.3.0 (R500 VAP regs, MSPOS regs, fixed tex3D size checking) */
     boolean drm_2_3_0;
     /* DRM 2.6.0 (Hyper-Z, GB_Z_PEQ_CONFIG allowed on rv350->r4xx, FG_ALPHA_VALUE) */