Noticed when poking around with texture layouts and found that my big
texture layout from the blob buffer overflowed. Values come from
http://vulkan.gpuinfo.org for Adreno 418, 512, 630.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4931>
* texture.
*/
-#define FDL_MAX_MIP_LEVELS 14
+#define FDL_MAX_MIP_LEVELS 15
struct fdl_slice {
uint32_t offset; /* offset of first layer in slice */
uint8_t num_vsc_pipes; /* number of pipes for a20x */
struct fd_vsc_pipe vsc_pipe[32];
- struct fd_tile tile[512];
+ struct fd_tile tile[2048];
struct list_head node;
};
/* Texturing. */
case PIPE_CAP_MAX_TEXTURE_2D_SIZE:
- return 1 << (MAX_MIP_LEVELS - 1);
+ if (is_a6xx(screen) || is_a5xx(screen) || is_a4xx(screen))
+ return 16384;
+ else
+ return 8192;
case PIPE_CAP_MAX_TEXTURE_CUBE_LEVELS:
- return MAX_MIP_LEVELS;
+ if (is_a6xx(screen) || is_a5xx(screen) || is_a4xx(screen))
+ return 15;
+ else
+ return 14;
case PIPE_CAP_MAX_TEXTURE_3D_LEVELS:
return 11;
enum adreno_stencil_op fd_stencil_op(unsigned op);
#define A3XX_MAX_MIP_LEVELS 14
-/* TBD if it is same on a2xx, but for now: */
-#define MAX_MIP_LEVELS A3XX_MAX_MIP_LEVELS
#define A2XX_MAX_RENDER_TARGETS 1
#define A3XX_MAX_RENDER_TARGETS 4