test: add failing test

diff --git a/tests/verilog/upto.ys b/tests/verilog/upto.ys
new file mode 100644 (file)
index 0000000..d87f442
--- /dev/null
+++ b/tests/verilog/upto.ys
@@ -0,0 +1,5 @@
+read_verilog <<EOT
+module top(input [-128:-65] a);
+endmodule
+EOT
+dump