* R5900 COP2 is now ready for testing. Let loose the dogs!

Mon Apr  6 19:55:56 1998  Frank Ch. Eigler  <fche@cygnus.com>

	* interp.c (cop_[ls]q): Replaced stub with proper COP2 code.

	* sim-main.h (LOADADDRMASK): Redefine to allow 128-bit accesses
 	for TARGET_SKY.

	* r5900.igen (SQC2): Thinko.

diff --git a/sim/mips/ChangeLog b/sim/mips/ChangeLog
index 1804d5c752044b1f08bc01fc21994b7f88c34cba..2c0f0b9a51a8b553a14dbd4c445487a1adf8c753 100644 (file)
--- a/sim/mips/ChangeLog
+++ b/sim/mips/ChangeLog
@@ -1,3 +1,15 @@
+start-sanitize-sky
+Mon Apr  6 19:55:56 1998  Frank Ch. Eigler  <fche@cygnus.com>
+
+       * interp.c (cop_[ls]q): Replaced stub with proper COP2 code.
+
+       * sim-main.h (LOADADDRMASK): Redefine to allow 128-bit accesses
+       for TARGET_SKY.
+
+       * r5900.igen (SQC2): Thinko.
+       
+end-sanitize-sky
+       
 start-sanitize-sky
 Sun Apr  5 12:05:44 1998  Frank Ch. Eigler  <fche@cygnus.com>
 

diff --git a/sim/mips/interp.c b/sim/mips/interp.c
index dac3a60e65704242dc2d7388b48e6195bf7e22be..7368695a40c2fd7e529ae69f188d73330f7dedd5 100644 (file)
--- a/sim/mips/interp.c
+++ b/sim/mips/interp.c
@@ -2971,9 +2971,22 @@ cop_lq (SIM_DESC sd,
   switch (coproc_num)
     {
     case 2:
-      /* XXX COP2 */
-      break;
-      
+      {
+       unsigned_16 xyzw;
+
+       while(vu0_busy())
+         vu0_issue(sd);
+       
+       memcpy(& xyzw, & memword, sizeof(xyzw));
+       xyzw = H2T_16(xyzw);
+       /* one word at a time, argh! */
+       write_vu_vec_reg(&(vu0_device.regs), coproc_reg, 0, A4_16(& xyzw, 3));
+       write_vu_vec_reg(&(vu0_device.regs), coproc_reg, 1, A4_16(& xyzw, 2));
+       write_vu_vec_reg(&(vu0_device.regs), coproc_reg, 2, A4_16(& xyzw, 1));
+       write_vu_vec_reg(&(vu0_device.regs), coproc_reg, 3, A4_16(& xyzw, 0));
+      }
+    break;
+    
     default:
       sim_io_printf(sd,"COP_LQ(%d,%d,??) at PC = 0x%s : TODO (architecture specific)\n",
                    coproc_num,coproc_reg,pr_addr(cia));
@@ -3059,9 +3072,22 @@ cop_sq (SIM_DESC sd,
   switch (coproc_num)
     {
     case 2:
-      /* XXX COP2 */
-      break;
+      {
+       unsigned_16 xyzw;
 
+       while(vu0_busy())
+         vu0_issue(sd);
+       
+       /* one word at a time, argh! */
+       read_vu_vec_reg(&(vu0_device.regs), coproc_reg, 0, A4_16(& xyzw, 3));
+       read_vu_vec_reg(&(vu0_device.regs), coproc_reg, 1, A4_16(& xyzw, 2));
+       read_vu_vec_reg(&(vu0_device.regs), coproc_reg, 2, A4_16(& xyzw, 1));
+       read_vu_vec_reg(&(vu0_device.regs), coproc_reg, 3, A4_16(& xyzw, 0));
+       xyzw = T2H_16(xyzw);
+       return xyzw;
+      }
+    break;
+    
     default:
       sim_io_printf(sd,"COP_SQ(%d,%d) at PC = 0x%s : TODO (architecture specific)\n",
                    coproc_num,coproc_reg,pr_addr(cia));

diff --git a/sim/mips/sim-main.h b/sim/mips/sim-main.h
index b7103866e6bb5b42e63ae43a7b3de2e80ed6b794..d4f831a122398e02725e6e1a7d0be4854c83c3dc 100644 (file)
--- a/sim/mips/sim-main.h
+++ b/sim/mips/sim-main.h
@@ -837,6 +837,17 @@ decode_coproc (SD, CPU, cia, (instruction))
 #define PSIZE (WITH_TARGET_ADDRESS_BITSIZE)
 #endif
 
+/* start-sanitize-sky */
+#ifdef TARGET_SKY
+     /* 128-bit accesses are allowed */
+#undef LOADDRMASK
+#define LOADDRMASK AccessLength_QUADWORD
+#undef PSIZE
+#define PSIZE (WITH_TARGET_ADDRESS_BITSIZE)
+#endif /* TARGET_SKY */
+/* end-sanitize-sky */
+
+
 INLINE_SIM_MAIN (int) address_translation PARAMS ((SIM_DESC sd, sim_cpu *, address_word cia, address_word vAddr, int IorD, int LorS, address_word *pAddr, int *CCA, int raw));
 #define AddressTranslation(vAddr,IorD,LorS,pAddr,CCA,host,raw) \
 address_translation (SD, CPU, cia, vAddr, IorD, LorS, pAddr, CCA, raw)