Remove Prefetch abort for breakpoints. Instead set the state to RESUME.

diff --git a/sim/arm/ChangeLog b/sim/arm/ChangeLog
index 4b1331a766ae566ff1ded33fb19a92ed93092620..7ed494d19abd4ecd44200d11e13650c19b49ca99 100644 (file)
--- a/sim/arm/ChangeLog
+++ b/sim/arm/ChangeLog
@@ -1,3 +1,8 @@
+2001-02-16  Nick Clifton  <nickc@redhat.com>
+
+       * armemu.c: Remove Prefetch abort for breakpoints.  Instead set
+       the state to RESUME.
+
 2001-02-14  Nick Clifton  <nickc@redhat.com>
 
        * armemu.c: Add code to preserve processor mode when a prefetch

diff --git a/sim/arm/armemu.c b/sim/arm/armemu.c
index f0a6103357151cb5b0576e0a47ff4bed4f6742a1..6b963c72c6fb82b4094a1ba20dc7770744726145 100644 (file)
--- a/sim/arm/armemu.c
+++ b/sim/arm/armemu.c
@@ -1340,7 +1340,6 @@ ARMul_Emulate26 (register ARMul_State * state)
                    {
                      ARMword value;
                      extern int SWI_vector_installed;
-                     int in_thumb_mode;
 
                      /* Hardware is allowed to optionally override this
                         instruction and treat it as a breakpoint.  Since
@@ -1378,17 +1377,8 @@ ARMul_Emulate26 (register ARMul_State * state)
                            }
                        }
 
-                     /* We must signal an abort to mark the next instruction as
-                        invalid and in need of refetching.  This is because if this
-                        the instruction was a breakpoint inserted by the debugger,
-                        the instruction could be changed back to its original value.
-                        The abort however, will automatically reset the processor into
-                        ARM mode, so we have to preserve the mode flag and resort it
-                        after singalling the abort.  */
-                     in_thumb_mode = TFLAG;
-                     ARMul_Abort (state, ARMul_PrefetchAbortV);
-                     ASSIGNT (in_thumb_mode);
-                     
+                     /* Force the next instruction to be refetched.  */
+                     state->NextInstr = RESUME;
                      break;
                    }
                }