[script]
read_verilog -formal -norestrict -assume-asserts picorv32.v
read_verilog -formal axicheck.v
-prep -nordff -top testbench
+prep -top testbench
[files]
picorv32.v ~/Work/picorv32/picorv32.v
print("# running in %s/src/" % self.workdir, file=f)
for cmd in self.script:
print(cmd, file=f)
+ print("memory_nordff", file=f)
if self.opt_multiclock:
print("clk2fflogic", file=f)
else:
print("chformal -cover -remove", file=f)
print("opt_clean", file=f)
print("setundef -anyseq", file=f)
+ print("opt -keepdc -fast", file=f)
+ print("check", file=f)
print("write_ilang ../model/design.il", file=f)
task = SbyTask(self, "script", [],