* recog.c (offsettable_address_p): Match the logic in adjust_address.
* config/sparc/sparc.h (LEGITIMIZE_RELOAD_ADDRESS): Handle TFmode
in 64-bit mode only. Use only for 32-bit or MEDLOW.
From-SVN: r52250
+2002-04-12 Richard Henderson <rth@redhat.com>
+
+ * recog.c (offsettable_address_p): Match the logic in adjust_address.
+
+ * config/sparc/sparc.h (LEGITIMIZE_RELOAD_ADDRESS): Handle TFmode
+ in 64-bit mode only. Use only for 32-bit or MEDLOW.
+
2002-04-12 Rainer Orth <ro@TechFak.Uni-Bielefeld.DE>
* config/alpha/osf.h (LINK_SPEC): Pass -S to silence ld warnings.
/* Decompose SImode constants into hi+lo_sum. We do have to \
rerecognize what we produce, so be careful. */ \
if (CONSTANT_P (X) \
- && (MODE != TFmode || TARGET_V9) \
+ && (MODE != TFmode || TARGET_ARCH64) \
&& GET_MODE (X) == SImode \
&& GET_CODE (X) != LO_SUM && GET_CODE (X) != HIGH \
&& ! (flag_pic \
&& (symbolic_operand (X, Pmode) \
- || pic_address_needs_scratch (X)))) \
+ || pic_address_needs_scratch (X))) \
+ && sparc_cmodel <= CM_MEDLOW) \
{ \
X = gen_rtx_LO_SUM (GET_MODE (X), \
gen_rtx_HIGH (GET_MODE (X), X), X); \
of the specified mode. We assume that if Y and Y+c are
valid addresses then so is Y+d for all 0<d<c. adjust_address will
go inside a LO_SUM here, so we do so as well. */
- if (GET_CODE (y) == LO_SUM)
+ if (GET_CODE (y) == LO_SUM
+ && mode != BLKmode
+ && mode_sz <= GET_MODE_ALIGNMENT (mode) / BITS_PER_UNIT)
z = gen_rtx_LO_SUM (GET_MODE (y), XEXP (y, 0),
plus_constant (XEXP (y, 1), mode_sz - 1));
else