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RTEMS: Use MULTILIB_REQUIRED for ARM
authorSebastian Huber <sebastian.huber@embedded-brains.de>
Fri, 9 Jan 2015 13:41:16 +0000 (13:41 +0000)
committerSebastian Huber <sh@gcc.gnu.org>
Fri, 9 Jan 2015 13:41:16 +0000 (13:41 +0000)
gcc/ChangeLog

* config/arm/t-rtems: Use MULTILIB_REQUIRED instead of
MULTILIB_EXCEPTIONS.

From-SVN: r219383

gcc/ChangeLog patch | blob | history
gcc/config/arm/t-rtems patch | blob | history

diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index 9ef523f733991bb41dbc37ecc0f4f75613156c6e..b15ba27433d117af0be71c7c7f0e7051a2ceda72 100644 (file)
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,3 +1,8 @@
+2015-01-09  Sebastian Huber  <sebastian.huber@embedded-brains.de>
+
+       * config/arm/t-rtems: Use MULTILIB_REQUIRED instead of
+       MULTILIB_EXCEPTIONS.
+
 2015-01-09  Sebastian Huber  <sebastian.huber@embedded-brains.de>
 
        * config/arm/t-rtems-eabi: Rename to...
diff --git a/gcc/config/arm/t-rtems b/gcc/config/arm/t-rtems
index 92c4dcb1288644c99a92de10836628aa4457177e..3b6218150aa63dbad23fede8fd05d8260a5acaa7 100644 (file)
--- a/gcc/config/arm/t-rtems
+++ b/gcc/config/arm/t-rtems
@@ -1,4 +1,4 @@
-# Custom RTEMS EABI multilibs
+# Custom RTEMS multilibs for ARM
 
 MULTILIB_OPTIONS  = mbig-endian mthumb march=armv6-m/march=armv7-a/march=armv7-r/march=armv7-m mfpu=neon/mfpu=vfpv3-d16/mfpu=fpv4-sp-d16 mfloat-abi=hard
 MULTILIB_DIRNAMES = eb thumb armv6-m armv7-a armv7-r armv7-m neon vfpv3-d16 fpv4-sp-d16 hard
@@ -6,162 +6,15 @@ MULTILIB_DIRNAMES = eb thumb armv6-m armv7-a armv7-r armv7-m neon vfpv3-d16 fpv4
 # Enumeration of multilibs
 
 MULTILIB_EXCEPTIONS =
-MULTILIB_EXCEPTIONS += mbig-endian/mthumb/march=armv6-m/mfpu=neon/mfloat-abi=hard
-MULTILIB_EXCEPTIONS += mbig-endian/mthumb/march=armv6-m/mfpu=neon
-MULTILIB_EXCEPTIONS += mbig-endian/mthumb/march=armv6-m/mfpu=vfpv3-d16/mfloat-abi=hard
-MULTILIB_EXCEPTIONS += mbig-endian/mthumb/march=armv6-m/mfpu=vfpv3-d16
-MULTILIB_EXCEPTIONS += mbig-endian/mthumb/march=armv6-m/mfpu=fpv4-sp-d16/mfloat-abi=hard
-MULTILIB_EXCEPTIONS += mbig-endian/mthumb/march=armv6-m/mfpu=fpv4-sp-d16
-MULTILIB_EXCEPTIONS += mbig-endian/mthumb/march=armv6-m/mfloat-abi=hard
-MULTILIB_EXCEPTIONS += mbig-endian/mthumb/march=armv6-m
-MULTILIB_EXCEPTIONS += mbig-endian/mthumb/march=armv7-a/mfpu=neon/mfloat-abi=hard
-MULTILIB_EXCEPTIONS += mbig-endian/mthumb/march=armv7-a/mfpu=neon
-MULTILIB_EXCEPTIONS += mbig-endian/mthumb/march=armv7-a/mfpu=vfpv3-d16/mfloat-abi=hard
-MULTILIB_EXCEPTIONS += mbig-endian/mthumb/march=armv7-a/mfpu=vfpv3-d16
-MULTILIB_EXCEPTIONS += mbig-endian/mthumb/march=armv7-a/mfpu=fpv4-sp-d16/mfloat-abi=hard
-MULTILIB_EXCEPTIONS += mbig-endian/mthumb/march=armv7-a/mfpu=fpv4-sp-d16
-MULTILIB_EXCEPTIONS += mbig-endian/mthumb/march=armv7-a/mfloat-abi=hard
-MULTILIB_EXCEPTIONS += mbig-endian/mthumb/march=armv7-a
-MULTILIB_EXCEPTIONS += mbig-endian/mthumb/march=armv7-r/mfpu=neon/mfloat-abi=hard
-MULTILIB_EXCEPTIONS += mbig-endian/mthumb/march=armv7-r/mfpu=neon
-# MULTILIB_EXCEPTIONS += mbig-endian/mthumb/march=armv7-r/mfpu=vfpv3-d16/mfloat-abi=hard
-MULTILIB_EXCEPTIONS += mbig-endian/mthumb/march=armv7-r/mfpu=vfpv3-d16
-MULTILIB_EXCEPTIONS += mbig-endian/mthumb/march=armv7-r/mfpu=fpv4-sp-d16/mfloat-abi=hard
-MULTILIB_EXCEPTIONS += mbig-endian/mthumb/march=armv7-r/mfpu=fpv4-sp-d16
-MULTILIB_EXCEPTIONS += mbig-endian/mthumb/march=armv7-r/mfloat-abi=hard
-# MULTILIB_EXCEPTIONS += mbig-endian/mthumb/march=armv7-r
-MULTILIB_EXCEPTIONS += mbig-endian/mthumb/march=armv7-m/mfpu=neon/mfloat-abi=hard
-MULTILIB_EXCEPTIONS += mbig-endian/mthumb/march=armv7-m/mfpu=neon
-MULTILIB_EXCEPTIONS += mbig-endian/mthumb/march=armv7-m/mfpu=vfpv3-d16/mfloat-abi=hard
-MULTILIB_EXCEPTIONS += mbig-endian/mthumb/march=armv7-m/mfpu=vfpv3-d16
-MULTILIB_EXCEPTIONS += mbig-endian/mthumb/march=armv7-m/mfpu=fpv4-sp-d16/mfloat-abi=hard
-MULTILIB_EXCEPTIONS += mbig-endian/mthumb/march=armv7-m/mfpu=fpv4-sp-d16
-MULTILIB_EXCEPTIONS += mbig-endian/mthumb/march=armv7-m/mfloat-abi=hard
-MULTILIB_EXCEPTIONS += mbig-endian/mthumb/march=armv7-m
-MULTILIB_EXCEPTIONS += mbig-endian/mthumb/mfpu=neon/mfloat-abi=hard
-MULTILIB_EXCEPTIONS += mbig-endian/mthumb/mfpu=neon
-MULTILIB_EXCEPTIONS += mbig-endian/mthumb/mfpu=vfpv3-d16/mfloat-abi=hard
-MULTILIB_EXCEPTIONS += mbig-endian/mthumb/mfpu=vfpv3-d16
-MULTILIB_EXCEPTIONS += mbig-endian/mthumb/mfpu=fpv4-sp-d16/mfloat-abi=hard
-MULTILIB_EXCEPTIONS += mbig-endian/mthumb/mfpu=fpv4-sp-d16
-MULTILIB_EXCEPTIONS += mbig-endian/mthumb/mfloat-abi=hard
-MULTILIB_EXCEPTIONS += mbig-endian/mthumb
-MULTILIB_EXCEPTIONS += mbig-endian/march=armv6-m/mfpu=neon/mfloat-abi=hard
-MULTILIB_EXCEPTIONS += mbig-endian/march=armv6-m/mfpu=neon
-MULTILIB_EXCEPTIONS += mbig-endian/march=armv6-m/mfpu=vfpv3-d16/mfloat-abi=hard
-MULTILIB_EXCEPTIONS += mbig-endian/march=armv6-m/mfpu=vfpv3-d16
-MULTILIB_EXCEPTIONS += mbig-endian/march=armv6-m/mfpu=fpv4-sp-d16/mfloat-abi=hard
-MULTILIB_EXCEPTIONS += mbig-endian/march=armv6-m/mfpu=fpv4-sp-d16
-MULTILIB_EXCEPTIONS += mbig-endian/march=armv6-m/mfloat-abi=hard
-MULTILIB_EXCEPTIONS += mbig-endian/march=armv6-m
-MULTILIB_EXCEPTIONS += mbig-endian/march=armv7-a/mfpu=neon/mfloat-abi=hard
-MULTILIB_EXCEPTIONS += mbig-endian/march=armv7-a/mfpu=neon
-MULTILIB_EXCEPTIONS += mbig-endian/march=armv7-a/mfpu=vfpv3-d16/mfloat-abi=hard
-MULTILIB_EXCEPTIONS += mbig-endian/march=armv7-a/mfpu=vfpv3-d16
-MULTILIB_EXCEPTIONS += mbig-endian/march=armv7-a/mfpu=fpv4-sp-d16/mfloat-abi=hard
-MULTILIB_EXCEPTIONS += mbig-endian/march=armv7-a/mfpu=fpv4-sp-d16
-MULTILIB_EXCEPTIONS += mbig-endian/march=armv7-a/mfloat-abi=hard
-MULTILIB_EXCEPTIONS += mbig-endian/march=armv7-a
-MULTILIB_EXCEPTIONS += mbig-endian/march=armv7-r/mfpu=neon/mfloat-abi=hard
-MULTILIB_EXCEPTIONS += mbig-endian/march=armv7-r/mfpu=neon
-MULTILIB_EXCEPTIONS += mbig-endian/march=armv7-r/mfpu=vfpv3-d16/mfloat-abi=hard
-MULTILIB_EXCEPTIONS += mbig-endian/march=armv7-r/mfpu=vfpv3-d16
-MULTILIB_EXCEPTIONS += mbig-endian/march=armv7-r/mfpu=fpv4-sp-d16/mfloat-abi=hard
-MULTILIB_EXCEPTIONS += mbig-endian/march=armv7-r/mfpu=fpv4-sp-d16
-MULTILIB_EXCEPTIONS += mbig-endian/march=armv7-r/mfloat-abi=hard
-MULTILIB_EXCEPTIONS += mbig-endian/march=armv7-r
-MULTILIB_EXCEPTIONS += mbig-endian/march=armv7-m/mfpu=neon/mfloat-abi=hard
-MULTILIB_EXCEPTIONS += mbig-endian/march=armv7-m/mfpu=neon
-MULTILIB_EXCEPTIONS += mbig-endian/march=armv7-m/mfpu=vfpv3-d16/mfloat-abi=hard
-MULTILIB_EXCEPTIONS += mbig-endian/march=armv7-m/mfpu=vfpv3-d16
-MULTILIB_EXCEPTIONS += mbig-endian/march=armv7-m/mfpu=fpv4-sp-d16/mfloat-abi=hard
-MULTILIB_EXCEPTIONS += mbig-endian/march=armv7-m/mfpu=fpv4-sp-d16
-MULTILIB_EXCEPTIONS += mbig-endian/march=armv7-m/mfloat-abi=hard
-MULTILIB_EXCEPTIONS += mbig-endian/march=armv7-m
-MULTILIB_EXCEPTIONS += mbig-endian/mfpu=neon/mfloat-abi=hard
-MULTILIB_EXCEPTIONS += mbig-endian/mfpu=neon
-MULTILIB_EXCEPTIONS += mbig-endian/mfpu=vfpv3-d16/mfloat-abi=hard
-MULTILIB_EXCEPTIONS += mbig-endian/mfpu=vfpv3-d16
-MULTILIB_EXCEPTIONS += mbig-endian/mfpu=fpv4-sp-d16/mfloat-abi=hard
-MULTILIB_EXCEPTIONS += mbig-endian/mfpu=fpv4-sp-d16
-MULTILIB_EXCEPTIONS += mbig-endian/mfloat-abi=hard
-MULTILIB_EXCEPTIONS += mbig-endian
-MULTILIB_EXCEPTIONS += mthumb/march=armv6-m/mfpu=neon/mfloat-abi=hard
-MULTILIB_EXCEPTIONS += mthumb/march=armv6-m/mfpu=neon
-MULTILIB_EXCEPTIONS += mthumb/march=armv6-m/mfpu=vfpv3-d16/mfloat-abi=hard
-MULTILIB_EXCEPTIONS += mthumb/march=armv6-m/mfpu=vfpv3-d16
-MULTILIB_EXCEPTIONS += mthumb/march=armv6-m/mfpu=fpv4-sp-d16/mfloat-abi=hard
-MULTILIB_EXCEPTIONS += mthumb/march=armv6-m/mfpu=fpv4-sp-d16
-MULTILIB_EXCEPTIONS += mthumb/march=armv6-m/mfloat-abi=hard
-# MULTILIB_EXCEPTIONS += mthumb/march=armv6-m
-# MULTILIB_EXCEPTIONS += mthumb/march=armv7-a/mfpu=neon/mfloat-abi=hard
-MULTILIB_EXCEPTIONS += mthumb/march=armv7-a/mfpu=neon
-MULTILIB_EXCEPTIONS += mthumb/march=armv7-a/mfpu=vfpv3-d16/mfloat-abi=hard
-MULTILIB_EXCEPTIONS += mthumb/march=armv7-a/mfpu=vfpv3-d16
-MULTILIB_EXCEPTIONS += mthumb/march=armv7-a/mfpu=fpv4-sp-d16/mfloat-abi=hard
-MULTILIB_EXCEPTIONS += mthumb/march=armv7-a/mfpu=fpv4-sp-d16
-MULTILIB_EXCEPTIONS += mthumb/march=armv7-a/mfloat-abi=hard
-# MULTILIB_EXCEPTIONS += mthumb/march=armv7-a
-MULTILIB_EXCEPTIONS += mthumb/march=armv7-r/mfpu=neon/mfloat-abi=hard
-MULTILIB_EXCEPTIONS += mthumb/march=armv7-r/mfpu=neon
-# MULTILIB_EXCEPTIONS += mthumb/march=armv7-r/mfpu=vfpv3-d16/mfloat-abi=hard
-MULTILIB_EXCEPTIONS += mthumb/march=armv7-r/mfpu=vfpv3-d16
-MULTILIB_EXCEPTIONS += mthumb/march=armv7-r/mfpu=fpv4-sp-d16/mfloat-abi=hard
-MULTILIB_EXCEPTIONS += mthumb/march=armv7-r/mfpu=fpv4-sp-d16
-MULTILIB_EXCEPTIONS += mthumb/march=armv7-r/mfloat-abi=hard
-# MULTILIB_EXCEPTIONS += mthumb/march=armv7-r
-MULTILIB_EXCEPTIONS += mthumb/march=armv7-m/mfpu=neon/mfloat-abi=hard
-MULTILIB_EXCEPTIONS += mthumb/march=armv7-m/mfpu=neon
-MULTILIB_EXCEPTIONS += mthumb/march=armv7-m/mfpu=vfpv3-d16/mfloat-abi=hard
-MULTILIB_EXCEPTIONS += mthumb/march=armv7-m/mfpu=vfpv3-d16
-# MULTILIB_EXCEPTIONS += mthumb/march=armv7-m/mfpu=fpv4-sp-d16/mfloat-abi=hard
-MULTILIB_EXCEPTIONS += mthumb/march=armv7-m/mfpu=fpv4-sp-d16
-MULTILIB_EXCEPTIONS += mthumb/march=armv7-m/mfloat-abi=hard
-# MULTILIB_EXCEPTIONS += mthumb/march=armv7-m
-MULTILIB_EXCEPTIONS += mthumb/mfpu=neon/mfloat-abi=hard
-MULTILIB_EXCEPTIONS += mthumb/mfpu=neon
-MULTILIB_EXCEPTIONS += mthumb/mfpu=vfpv3-d16/mfloat-abi=hard
-MULTILIB_EXCEPTIONS += mthumb/mfpu=vfpv3-d16
-MULTILIB_EXCEPTIONS += mthumb/mfpu=fpv4-sp-d16/mfloat-abi=hard
-MULTILIB_EXCEPTIONS += mthumb/mfpu=fpv4-sp-d16
-MULTILIB_EXCEPTIONS += mthumb/mfloat-abi=hard
-# MULTILIB_EXCEPTIONS += mthumb
-MULTILIB_EXCEPTIONS += march=armv6-m/mfpu=neon/mfloat-abi=hard
-MULTILIB_EXCEPTIONS += march=armv6-m/mfpu=neon
-MULTILIB_EXCEPTIONS += march=armv6-m/mfpu=vfpv3-d16/mfloat-abi=hard
-MULTILIB_EXCEPTIONS += march=armv6-m/mfpu=vfpv3-d16
-MULTILIB_EXCEPTIONS += march=armv6-m/mfpu=fpv4-sp-d16/mfloat-abi=hard
-MULTILIB_EXCEPTIONS += march=armv6-m/mfpu=fpv4-sp-d16
-MULTILIB_EXCEPTIONS += march=armv6-m/mfloat-abi=hard
-MULTILIB_EXCEPTIONS += march=armv6-m
-MULTILIB_EXCEPTIONS += march=armv7-a/mfpu=neon/mfloat-abi=hard
-MULTILIB_EXCEPTIONS += march=armv7-a/mfpu=neon
-MULTILIB_EXCEPTIONS += march=armv7-a/mfpu=vfpv3-d16/mfloat-abi=hard
-MULTILIB_EXCEPTIONS += march=armv7-a/mfpu=vfpv3-d16
-MULTILIB_EXCEPTIONS += march=armv7-a/mfpu=fpv4-sp-d16/mfloat-abi=hard
-MULTILIB_EXCEPTIONS += march=armv7-a/mfpu=fpv4-sp-d16
-MULTILIB_EXCEPTIONS += march=armv7-a/mfloat-abi=hard
-MULTILIB_EXCEPTIONS += march=armv7-a
-MULTILIB_EXCEPTIONS += march=armv7-r/mfpu=neon/mfloat-abi=hard
-MULTILIB_EXCEPTIONS += march=armv7-r/mfpu=neon
-MULTILIB_EXCEPTIONS += march=armv7-r/mfpu=vfpv3-d16/mfloat-abi=hard
-MULTILIB_EXCEPTIONS += march=armv7-r/mfpu=vfpv3-d16
-MULTILIB_EXCEPTIONS += march=armv7-r/mfpu=fpv4-sp-d16/mfloat-abi=hard
-MULTILIB_EXCEPTIONS += march=armv7-r/mfpu=fpv4-sp-d16
-MULTILIB_EXCEPTIONS += march=armv7-r/mfloat-abi=hard
-MULTILIB_EXCEPTIONS += march=armv7-r
-MULTILIB_EXCEPTIONS += march=armv7-m/mfpu=neon/mfloat-abi=hard
-MULTILIB_EXCEPTIONS += march=armv7-m/mfpu=neon
-MULTILIB_EXCEPTIONS += march=armv7-m/mfpu=vfpv3-d16/mfloat-abi=hard
-MULTILIB_EXCEPTIONS += march=armv7-m/mfpu=vfpv3-d16
-MULTILIB_EXCEPTIONS += march=armv7-m/mfpu=fpv4-sp-d16/mfloat-abi=hard
-MULTILIB_EXCEPTIONS += march=armv7-m/mfpu=fpv4-sp-d16
-MULTILIB_EXCEPTIONS += march=armv7-m/mfloat-abi=hard
-MULTILIB_EXCEPTIONS += march=armv7-m
-MULTILIB_EXCEPTIONS += mfpu=neon/mfloat-abi=hard
-MULTILIB_EXCEPTIONS += mfpu=neon
-MULTILIB_EXCEPTIONS += mfpu=vfpv3-d16/mfloat-abi=hard
-MULTILIB_EXCEPTIONS += mfpu=vfpv3-d16
-MULTILIB_EXCEPTIONS += mfpu=fpv4-sp-d16/mfloat-abi=hard
-MULTILIB_EXCEPTIONS += mfpu=fpv4-sp-d16
-MULTILIB_EXCEPTIONS += mfloat-abi=hard
+
+MULTILIB_REQUIRED =
+MULTILIB_REQUIRED += mbig-endian/mthumb/march=armv7-r/mfpu=vfpv3-d16/mfloat-abi=hard
+MULTILIB_REQUIRED += mbig-endian/mthumb/march=armv7-r
+MULTILIB_REQUIRED += mthumb/march=armv6-m
+MULTILIB_REQUIRED += mthumb/march=armv7-a/mfpu=neon/mfloat-abi=hard
+MULTILIB_REQUIRED += mthumb/march=armv7-a
+MULTILIB_REQUIRED += mthumb/march=armv7-r/mfpu=vfpv3-d16/mfloat-abi=hard
+MULTILIB_REQUIRED += mthumb/march=armv7-r
+MULTILIB_REQUIRED += mthumb/march=armv7-m/mfpu=fpv4-sp-d16/mfloat-abi=hard
+MULTILIB_REQUIRED += mthumb/march=armv7-m
+MULTILIB_REQUIRED += mthumb