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X86: Fix store microops so they don't drop faults in timing mode.
author
Gabe Black
<gblack@eecs.umich.edu>
Sun, 3 Jul 2011 05:31:22 +0000
(22:31 -0700)
committer
Gabe Black
<gblack@eecs.umich.edu>
Sun, 3 Jul 2011 05:31:22 +0000
(22:31 -0700)
If a fault was returned by the CPU when a store initiated it's write, the
store instruction would ignore the fault. This change fixes that.
src/arch/x86/isa/microops/ldstop.isa
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diff --git
a/src/arch/x86/isa/microops/ldstop.isa
b/src/arch/x86/isa/microops/ldstop.isa
index 811b35c8aa759fb8988c4f6c236531de1a6b9192..f7a38b4864f6882a70aebaac75477636cdc75e0c 100644
(file)
--- a/
src/arch/x86/isa/microops/ldstop.isa
+++ b/
src/arch/x86/isa/microops/ldstop.isa
@@
-201,7
+201,7
@@
def template MicroStoreInitiateAcc {{
if(fault == NoFault)
{
- write(xc, Mem, EA, memFlags);
+
fault =
write(xc, Mem, EA, memFlags);
}
return fault;
}