add instruction format to setvl

diff --git a/openpower/sv/setvl.mdwn b/openpower/sv/setvl.mdwn
index 6bd770b5fe113b81ad5a5f0c6522c418aa200fb6..8a9077127758e2707d647583a162675c883c992a 100644 (file)
--- a/openpower/sv/setvl.mdwn
+++ b/openpower/sv/setvl.mdwn
@@ -81,6 +81,11 @@ Form: SVL-Form (see [[isatables/fields.text]])
 | -- | -- | --- | ---- |----------- | ----- |--| ------- |
 |OPCD| RT | RA  | SVi  |cv ms vs vf | 11110 |Rc| setvl   |
 
+Instruction format:
+
+    setvl RT,RA,SVi,vf,vs,ms
+    setvl. RT,RA,SVi,vf,vs,ms
+
 Note that the immediate (`SVi`) spans 7 bits (16 to 22)
 
 * `cv` - bit 22 - reads CTR instead of RA