use RVC reg encoding in VL Block

diff --git a/simple_v_extension/vblock_format_table.mdwn b/simple_v_extension/vblock_format_table.mdwn
index 00e7178becc590ad91940718dba8718ef32e76f6..d381ede9fd57053164d3c1a9fdc44800bf01f508 100644 (file)
--- a/simple_v_extension/vblock_format_table.mdwn
+++ b/simple_v_extension/vblock_format_table.mdwn
@@ -18,6 +18,6 @@ The VL/MAXVL/SubVL Block format:
 0b00  | SubVL | VLdest | imm[5:0]           || VL set from imm      |
 0b01  | SubVL | MVLimm | rs1[2:0] | rd[2:0]  | RVC reg format       |
 0b10  | SubVL | VLdest | imm[5:0]           || VL & MVL set from imm|
-0b11  | rsvd  | rsvd   | rsvd     |    rsv   | reserved, all 0s     |
+0b11  | rsvd  | rsvd   | rsvd     | rsvd     | reserved, all 0s     |
 """]]