write_xaiger to use original bit for co, not sigmap()-ed bit

diff --git a/backends/aiger/xaiger.cc b/backends/aiger/xaiger.cc
index 56d361fffd169b39f7f557498fc69c9c2faa1b34..b0602dbd802754fe62cf5f400837f3df5f655d49 100644 (file)
--- a/backends/aiger/xaiger.cc
+++ b/backends/aiger/xaiger.cc
@@ -210,9 +210,12 @@ struct XAigerWriter
                                        Wire *w = b.wire;
                                        if (!w) continue;
                                        if (cell->input(c.first)) {
-                                               SigBit I = sigmap(b);
-                                               if (!w->port_input)
-                                                       co_bits.insert(I);
+                                               if (!w->port_input) {
+                                                       SigBit I = sigmap(b);
+                                                       if (I != b)
+                                                               alias_map[b] = I;
+                                                       co_bits.insert(b);
+                                               }
                                        }
                                        else if (cell->output(c.first)) {
                                                SigBit O = sigmap(b);