radeonsi: sdma misc fixes
authorPierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Thu, 17 Oct 2019 14:15:54 +0000 (16:15 +0200)
committerPierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Wed, 30 Oct 2019 17:03:14 +0000 (18:03 +0100)
SDMA IB doesn't need to be padded for SDMA.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
src/gallium/drivers/radeonsi/si_dma_cs.c
src/gallium/winsys/amdgpu/drm/amdgpu_cs.c

index c5d6a6e39cd6e02cec132eade77282a3ac9c20a6..c550a62ee0b56ea245806676ade87d67372b8135 100644 (file)
@@ -117,7 +117,8 @@ void si_sdma_clear_buffer(struct si_context *sctx, struct pipe_resource *dst,
                radeon_emit(cs, offset);
                radeon_emit(cs, offset >> 32);
                radeon_emit(cs, clear_value);
-               radeon_emit(cs, sctx->chip_class >= GFX9 ? csize - 1 : csize);
+               /* dw count */
+               radeon_emit(cs, (sctx->chip_class >= GFX9 ? csize - 1 : csize) & 0xfffffffc);
                offset += csize;
                size -= csize;
        }
index c6d45b381fc1564631759e1e8df3f4522ac8db0f..a577067edc0e36e2d7c78998e97d0510e5f472fe 100644 (file)
@@ -1680,9 +1680,6 @@ static int amdgpu_cs_flush(struct radeon_cmdbuf *rcs,
       if (ws->info.chip_class <= GFX6) {
          while (rcs->current.cdw & 7)
             radeon_emit(rcs, 0xf0000000); /* NOP packet */
-      } else {
-         while (rcs->current.cdw & 7)
-            radeon_emit(rcs, 0x00000000); /* NOP packet */
       }
       break;
    case RING_GFX: