+Wed Oct 2 21:31:26 1996 Jeffrey A Law (law@cygnus.com)
+
+ * mn10x00.h: New file.
+
+start-sanitize-v850
+Fri Sep 27 18:26:46 1996 Stu Grossman (grossman@critters.cygnus.com)
+
+ * v850.h: Add new flag to indicate this instruction uses a PC
+ displacement.
+
+end-sanitize-v850
+Fri Sep 13 14:58:13 1996 Jeffrey A Law (law@cygnus.com)
+
+ * h8300.h (stmac): Add missing instruction.
+
start-sanitize-v850
+Sat Aug 31 16:02:03 1996 Jeffrey A Law (law@cygnus.com)
+
+ * v850.h (v850_opcode): Remove "size" field. Add "memop"
+ field.
+
+Fri Aug 23 10:39:08 1996 Jeffrey A Law (law@cygnus.com)
+
+ * v850.h (V850_OPERAND_EP): Define.
+
+ * v850.h (v850_opcode): Add size field.
+
Thu Aug 22 16:51:25 1996 J.T. Conklin <jtc@rtl.cygnus.com>
* v850.h (v850_operands): Add insert and extract fields, pointers
--- /dev/null
+/* mn10x00.h -- Header file for Matsushita 10200 and 10300 opcode table
+ Copyright 1996 Free Software Foundation, Inc.
+ Written by Jeff Law, Cygnus Support
+
+This file is part of GDB, GAS, and the GNU binutils.
+
+GDB, GAS, and the GNU binutils are free software; you can redistribute
+them and/or modify them under the terms of the GNU General Public
+License as published by the Free Software Foundation; either version
+1, or (at your option) any later version.
+
+GDB, GAS, and the GNU binutils are distributed in the hope that they
+will be useful, but WITHOUT ANY WARRANTY; without even the implied
+warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See
+the GNU General Public License for more details.
+
+You should have received a copy of the GNU General Public License
+along with this file; see the file COPYING. If not, write to the Free
+Software Foundation, 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
+
+#ifndef MN10x00_H
+#define MN10x00_H
+
+/* The opcode table is an array of struct mn10x00_opcode. */
+
+struct mn10x00_opcode
+{
+ /* The opcode name. */
+ const char *name;
+
+ /* The opcode itself. Those bits which will be filled in with
+ operands are zeroes. */
+ unsigned long opcode;
+
+ /* The opcode mask. This is used by the disassembler. This is a
+ mask containing ones indicating those bits which must match the
+ opcode field, and zeroes indicating those bits which need not
+ match (and are presumably filled in by operands). */
+ unsigned long mask;
+
+ /* An array of operand codes. Each code is an index into the
+ operand table. They appear in the order which the operands must
+ appear in assembly code, and are terminated by a zero. */
+ unsigned char operands[8];
+};
+
+/* The table itself is sorted by major opcode number, and is otherwise
+ in the order in which the disassembler should consider
+ instructions. */
+extern const struct mn10x00_opcode mn10x00_opcodes[];
+extern const int mn10x00_num_opcodes;
+
+\f
+/* The operands table is an array of struct powerpc_operand. */
+
+struct mn10x00_operand
+{
+ /* The number of bits in the operand. */
+ int bits;
+
+ /* How far the operand is left shifted in the instruction. */
+ int shift;
+
+ /* One bit syntax flags. */
+ int flags;
+};
+
+/* Elements in the table are retrieved by indexing with values from
+ the operands field of the mn10x00_opcodes table. */
+
+extern const struct mn10x00_operand mn10x00_operands[];
+
+/* Values defined for the flags field of a struct mn10x00_operand. */
+
+#endif /* MN10x00_H */