x86: properly decode EVEX.W for AVX512_4{FMAPS,VNNIW} insns

These require EVEX.W=0. Use %XS to facilitate the checking, even if for
the AVX512_4VNNIW ones this is kind of an abuse (as 's' there stands for
"signed", not "single").

While there also correct the 3rd operand for the AVX512_4VNNIW entries:
Only the memory form is allowed (just like for AVX512_4FMAPS, where the
correct type is already in use).

diff --git a/opcodes/i386-dis-evex-prefix.h b/opcodes/i386-dis-evex-prefix.h
index 91471723cdcf83657a8fe485d21a6ed5eb9e7d56..e48ce4194ff97c56c8fa7b03772c6e9f3695f128 100644 (file)
--- a/opcodes/i386-dis-evex-prefix.h
+++ b/opcodes/i386-dis-evex-prefix.h
@@ -234,14 +234,14 @@
     { Bad_Opcode },
     { "vdpbf16p%XS", { XM, Vex, EXx }, 0 },
     { VEX_W_TABLE (VEX_W_0F3852) },
-    { "vp4dpwssd",     { XM, Vex, EXxmm }, 0 },
+    { "vp4dpws%XSd",   { XM, Vex, Mxmm }, 0 },
   },
   /* PREFIX_EVEX_0F3853 */
   {
     { Bad_Opcode },
     { Bad_Opcode },
     { VEX_W_TABLE (VEX_W_0F3853) },
-    { "vp4dpwssds",    { XM, Vex, EXxmm }, 0 },
+    { "vp4dpws%XSds",  { XM, Vex, Mxmm }, 0 },
   },
   /* PREFIX_EVEX_0F3868 */
   {
@@ -262,28 +262,28 @@
     { Bad_Opcode },
     { Bad_Opcode },
     { "vfmsub132p%XW", { XM, Vex, EXx, EXxEVexR }, 0 },
-    { "v4fmaddps",     { XM, Vex, Mxmm }, 0 },
+    { "v4fmaddp%XS",   { XM, Vex, Mxmm }, 0 },
   },
   /* PREFIX_EVEX_0F389B */
   {
     { Bad_Opcode },
     { Bad_Opcode },
     { "vfmsub132s%XW", { XMScalar, VexScalar, EXdq, EXxEVexR }, 0 },
-    { "v4fmaddss",     { XMScalar, VexScalar, Mxmm }, 0 },
+    { "v4fmadds%XS",   { XMScalar, VexScalar, Mxmm }, 0 },
   },
   /* PREFIX_EVEX_0F38AA */
   {
     { Bad_Opcode },
     { Bad_Opcode },
     { "vfmsub213p%XW", { XM, Vex, EXx, EXxEVexR }, 0 },
-    { "v4fnmaddps",    { XM, Vex, Mxmm }, 0 },
+    { "v4fnmaddp%XS",  { XM, Vex, Mxmm }, 0 },
   },
   /* PREFIX_EVEX_0F38AB */
   {
     { Bad_Opcode },
     { Bad_Opcode },
     { "vfmsub213s%XW", { XMScalar, VexScalar, EXdq, EXxEVexR }, 0 },
-    { "v4fnmaddss",    { XMScalar, VexScalar, Mxmm }, 0 },
+    { "v4fnmadds%XS",  { XMScalar, VexScalar, Mxmm }, 0 },
   },
   /* PREFIX_EVEX_0F3A08 */
   {