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mips.c (MIPS_FP_CONDITIONS): New macro.
authorRichard Sandiford <rsandifo@redhat.com>
Mon, 30 Aug 2004 18:31:08 +0000 (18:31 +0000)
committerRichard Sandiford <rsandifo@gcc.gnu.org>
Mon, 30 Aug 2004 18:31:08 +0000 (18:31 +0000)
* config/mips/mips.c (MIPS_FP_CONDITIONS): New macro.
(mips_fp_condition): New enum.
(mips_fp_conditions): New array.
(print_fcc_operand): Delete.
(print_operand): Remove %V, %v and %Q.  Redefine %Z so that it prints
the operand and comma if and only if ISA_HAS_8CC.  Add %Y.
(builtin_description): Add "cond" field.
(DIRECT_BUILTIN): Initialize it.
(CMP_{SCALAR,PS,4S}_BUILTINS, MOVTF_BUILTINS): Split INSN parameter
into INSN and CODE.  Initialize the "cond" field.
(CMP_BUILTINS): Update accordingly.
(mips_bdesc): Use MIPS_FP_CONDITIONS to invoke CMP_BUILTINS.
(mips_expand_builtin_movtf, mips_expand_builtin_compare): Take the
mips_fp_condition as argument.  Make it the final operand of the
comparison instruction.
(mips_expand_builtin): Update accordingly.
* config/mips/mips.md (UNSPEC_C_*, UNSPEC_CABS_*): Delete.
(UNSPEC_C, UNSPEC_CABS): New constants.  Shuffle others to fill
the gaps.
* config/mips/mips-ps-3d.md (mips_cond_move_tf_ps, bc1any[24][ft]):
Don't use the 'Q' operand prefix; just print the operand normally.
(mips_cabs_*, mips_c_*): Delete, replacing with...
(mips_c_cond_{ps,4s}, mips_cabs_cond_{s,d,ps,4s}): ...these new
patterns.  Split the 4s versions into 2 ps patterns after reload.

From-SVN: r86791

gcc/ChangeLog patch | blob | history
gcc/config/mips/mips-ps-3d.md patch | blob | history
gcc/config/mips/mips.c patch | blob | history
gcc/config/mips/mips.md patch | blob | history

diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index 6320873a49d5f21b9f94a6262c23c7935c4f934f..e8a423c4f04b77243e008a3df2ffc57148ee1741 100644 (file)
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,3 +1,30 @@
+2004-08-30  Richard Sandiford  <rsandifo@redhat.com>
+
+       * config/mips/mips.c (MIPS_FP_CONDITIONS): New macro.
+       (mips_fp_condition): New enum.
+       (mips_fp_conditions): New array.
+       (print_fcc_operand): Delete.
+       (print_operand): Remove %V, %v and %Q.  Redefine %Z so that it prints
+       the operand and comma if and only if ISA_HAS_8CC.  Add %Y.
+       (builtin_description): Add "cond" field.
+       (DIRECT_BUILTIN): Initialize it.
+       (CMP_{SCALAR,PS,4S}_BUILTINS, MOVTF_BUILTINS): Split INSN parameter
+       into INSN and CODE.  Initialize the "cond" field.
+       (CMP_BUILTINS): Update accordingly.
+       (mips_bdesc): Use MIPS_FP_CONDITIONS to invoke CMP_BUILTINS.
+       (mips_expand_builtin_movtf, mips_expand_builtin_compare): Take the
+       mips_fp_condition as argument.  Make it the final operand of the
+       comparison instruction.
+       (mips_expand_builtin): Update accordingly.
+       * config/mips/mips.md (UNSPEC_C_*, UNSPEC_CABS_*): Delete.
+       (UNSPEC_C, UNSPEC_CABS): New constants.  Shuffle others to fill
+       the gaps.
+       * config/mips/mips-ps-3d.md (mips_cond_move_tf_ps, bc1any[24][ft]):
+       Don't use the 'Q' operand prefix; just print the operand normally.
+       (mips_cabs_*, mips_c_*): Delete, replacing with...
+       (mips_c_cond_{ps,4s}, mips_cabs_cond_{s,d,ps,4s}): ...these new
+       patterns.  Split the 4s versions into 2 ps patterns after reload.
+
 2004-08-30  Richard Henderson  <rth@redhat.com>
 
        * fold-const.c (tree_expr_nonzero_p): Use get_base_address before
diff --git a/gcc/config/mips/mips-ps-3d.md b/gcc/config/mips/mips-ps-3d.md
index 0c0bf343492a013885db0b4c6939c2ce79a38a46..c2615619b057fc5bff47d737b2c83bf2ec6e9f02 100644 (file)
--- a/gcc/config/mips/mips-ps-3d.md
+++ b/gcc/config/mips/mips-ps-3d.md
@@ -41,8 +41,8 @@
                     UNSPEC_MOVE_TF_PS))]
   "TARGET_PAIRED_SINGLE_FLOAT"
   "@
-    movt.ps\t%0,%1,%Q3
-    movf.ps\t%0,%2,%Q3"
+    movt.ps\t%0,%1,%3
+    movf.ps\t%0,%2,%3"
   [(set_attr "type" "condmove")
    (set_attr "mode" "SF")])
 
@@ -277,1080 +277,110 @@
    (set_attr "mode" "SF")])
 
 ;----------------------------------------------------------------------------
-; Floating Point Absolute Comparisions for Singles
+; Floating Point Comparisions for Scalars
 ;----------------------------------------------------------------------------
 
-(define_insn "mips_cabs_f_s"
+(define_insn "mips_cabs_cond_<fmt>"
   [(set (match_operand:CC 0 "register_operand" "=z")
-       (unspec:CC [(match_operand:SF 1 "register_operand" "f")
-                   (match_operand:SF 2 "register_operand" "f")]
-                  UNSPEC_CABS_F))]
+       (unspec:CC [(match_operand:SCALARF 1 "register_operand" "f")
+                   (match_operand:SCALARF 2 "register_operand" "f")
+                   (match_operand 3 "const_int_operand" "")]
+                  UNSPEC_CABS))]
   "TARGET_MIPS3D"
-  "cabs.f.s\t%Q0,%1,%2"
+  "cabs.%Y3.<fmt>\t%0,%1,%2"
   [(set_attr "type" "fcmp")
    (set_attr "mode" "FPSW")])
 
-(define_insn "mips_cabs_un_s"
-  [(set (match_operand:CC 0 "register_operand" "=z")
-       (unspec:CC [(match_operand:SF 1 "register_operand" "f")
-                   (match_operand:SF 2 "register_operand" "f")]
-                  UNSPEC_CABS_UN))]
-  "TARGET_MIPS3D"
-  "cabs.un.s\t%Q0,%1,%2"
-  [(set_attr "type" "fcmp")
-   (set_attr "mode" "FPSW")])
-
-(define_insn "mips_cabs_eq_s"
-  [(set (match_operand:CC 0 "register_operand" "=z")
-       (unspec:CC [(match_operand:SF 1 "register_operand" "f")
-                   (match_operand:SF 2 "register_operand" "f")]
-                  UNSPEC_CABS_EQ))]
-  "TARGET_MIPS3D"
-  "cabs.eq.s\t%Q0,%1,%2"
-  [(set_attr "type" "fcmp")
-   (set_attr "mode" "FPSW")])
-
-(define_insn "mips_cabs_ueq_s"
-  [(set (match_operand:CC 0 "register_operand" "=z")
-       (unspec:CC [(match_operand:SF 1 "register_operand" "f")
-                   (match_operand:SF 2 "register_operand" "f")]
-                  UNSPEC_CABS_UEQ))]
-  "TARGET_MIPS3D"
-  "cabs.ueq.s\t%Q0,%1,%2"
-  [(set_attr "type" "fcmp")
-   (set_attr "mode" "FPSW")])
-
-(define_insn "mips_cabs_olt_s"
-  [(set (match_operand:CC 0 "register_operand" "=z")
-       (unspec:CC [(match_operand:SF 1 "register_operand" "f")
-                   (match_operand:SF 2 "register_operand" "f")]
-                  UNSPEC_CABS_OLT))]
-  "TARGET_MIPS3D"
-  "cabs.olt.s\t%Q0,%1,%2"
-  [(set_attr "type" "fcmp")
-   (set_attr "mode" "FPSW")])
-
-(define_insn "mips_cabs_ult_s"
-  [(set (match_operand:CC 0 "register_operand" "=z")
-       (unspec:CC [(match_operand:SF 1 "register_operand" "f")
-                   (match_operand:SF 2 "register_operand" "f")]
-                  UNSPEC_CABS_ULT))]
-  "TARGET_MIPS3D"
-  "cabs.ult.s\t%Q0,%1,%2"
-  [(set_attr "type" "fcmp")
-   (set_attr "mode" "FPSW")])
-
-(define_insn "mips_cabs_ole_s"
-  [(set (match_operand:CC 0 "register_operand" "=z")
-       (unspec:CC [(match_operand:SF 1 "register_operand" "f")
-                   (match_operand:SF 2 "register_operand" "f")]
-                  UNSPEC_CABS_OLE))]
-  "TARGET_MIPS3D"
-  "cabs.ole.s\t%Q0,%1,%2"
-  [(set_attr "type" "fcmp")
-   (set_attr "mode" "FPSW")])
-
-(define_insn "mips_cabs_ule_s"
-  [(set (match_operand:CC 0 "register_operand" "=z")
-       (unspec:CC [(match_operand:SF 1 "register_operand" "f")
-                   (match_operand:SF 2 "register_operand" "f")]
-                  UNSPEC_CABS_ULE))]
-  "TARGET_MIPS3D"
-  "cabs.ule.s\t%Q0,%1,%2"
-  [(set_attr "type" "fcmp")
-   (set_attr "mode" "FPSW")])
-
-(define_insn "mips_cabs_sf_s"
-  [(set (match_operand:CC 0 "register_operand" "=z")
-       (unspec:CC [(match_operand:SF 1 "register_operand" "f")
-                   (match_operand:SF 2 "register_operand" "f")]
-                  UNSPEC_CABS_SF))]
-  "TARGET_MIPS3D"
-  "cabs.sf.s\t%Q0,%1,%2"
-  [(set_attr "type" "fcmp")
-   (set_attr "mode" "FPSW")])
-
-(define_insn "mips_cabs_ngle_s"
-  [(set (match_operand:CC 0 "register_operand" "=z")
-       (unspec:CC [(match_operand:SF 1 "register_operand" "f")
-                   (match_operand:SF 2 "register_operand" "f")]
-                  UNSPEC_CABS_NGLE))]
-  "TARGET_MIPS3D"
-  "cabs.ngle.s\t%Q0,%1,%2"
-  [(set_attr "type" "fcmp")
-   (set_attr "mode" "FPSW")])
-
-(define_insn "mips_cabs_seq_s"
-  [(set (match_operand:CC 0 "register_operand" "=z")
-       (unspec:CC [(match_operand:SF 1 "register_operand" "f")
-                   (match_operand:SF 2 "register_operand" "f")]
-                  UNSPEC_CABS_SEQ))]
-  "TARGET_MIPS3D"
-  "cabs.seq.s\t%Q0,%1,%2"
-  [(set_attr "type" "fcmp")
-   (set_attr "mode" "FPSW")])
-
-(define_insn "mips_cabs_ngl_s"
-  [(set (match_operand:CC 0 "register_operand" "=z")
-       (unspec:CC [(match_operand:SF 1 "register_operand" "f")
-                   (match_operand:SF 2 "register_operand" "f")]
-                  UNSPEC_CABS_NGL))]
-  "TARGET_MIPS3D"
-  "cabs.ngl.s\t%Q0,%1,%2"
-  [(set_attr "type" "fcmp")
-   (set_attr "mode" "FPSW")])
-
-(define_insn "mips_cabs_lt_s"
-  [(set (match_operand:CC 0 "register_operand" "=z")
-       (unspec:CC [(match_operand:SF 1 "register_operand" "f")
-                   (match_operand:SF 2 "register_operand" "f")]
-                  UNSPEC_CABS_LT))]
-  "TARGET_MIPS3D"
-  "cabs.lt.s\t%Q0,%1,%2"
-  [(set_attr "type" "fcmp")
-   (set_attr "mode" "FPSW")])
-
-(define_insn "mips_cabs_nge_s"
-  [(set (match_operand:CC 0 "register_operand" "=z")
-       (unspec:CC [(match_operand:SF 1 "register_operand" "f")
-                   (match_operand:SF 2 "register_operand" "f")]
-                  UNSPEC_CABS_NGE))]
-  "TARGET_MIPS3D"
-  "cabs.nge.s\t%Q0,%1,%2"
-  [(set_attr "type" "fcmp")
-   (set_attr "mode" "FPSW")])
-
-(define_insn "mips_cabs_le_s"
-  [(set (match_operand:CC 0 "register_operand" "=z")
-       (unspec:CC [(match_operand:SF 1 "register_operand" "f")
-                   (match_operand:SF 2 "register_operand" "f")]
-                  UNSPEC_CABS_LE))]
-  "TARGET_MIPS3D"
-  "cabs.le.s\t%Q0,%1,%2"
-  [(set_attr "type" "fcmp")
-   (set_attr "mode" "FPSW")])
-
-(define_insn "mips_cabs_ngt_s"
-  [(set (match_operand:CC 0 "register_operand" "=z")
-       (unspec:CC [(match_operand:SF 1 "register_operand" "f")
-                   (match_operand:SF 2 "register_operand" "f")]
-                  UNSPEC_CABS_NGT))]
-  "TARGET_MIPS3D"
-  "cabs.ngt.s\t%Q0,%1,%2"
-  [(set_attr "type" "fcmp")
-   (set_attr "mode" "FPSW")])
-
-;----------------------------------------------------------------------------
-; Floating Point Absolute Comparisions for Doubles
-;----------------------------------------------------------------------------
-(define_insn "mips_cabs_f_d"
-  [(set (match_operand:CC 0 "register_operand" "=z")
-       (unspec:CC [(match_operand:DF 1 "register_operand" "f")
-                   (match_operand:DF 2 "register_operand" "f")]
-                  UNSPEC_CABS_F))]
-  "TARGET_MIPS3D"
-  "cabs.f.d\t%Q0,%1,%2"
-  [(set_attr "type" "fcmp")
-   (set_attr "mode" "FPSW")])
-
-(define_insn "mips_cabs_un_d"
-  [(set (match_operand:CC 0 "register_operand" "=z")
-       (unspec:CC [(match_operand:DF 1 "register_operand" "f")
-                   (match_operand:DF 2 "register_operand" "f")]
-                  UNSPEC_CABS_UN))]
-  "TARGET_MIPS3D"
-  "cabs.un.d\t%Q0,%1,%2"
-  [(set_attr "type" "fcmp")
-   (set_attr "mode" "FPSW")])
-
-(define_insn "mips_cabs_eq_d"
-  [(set (match_operand:CC 0 "register_operand" "=z")
-       (unspec:CC [(match_operand:DF 1 "register_operand" "f")
-                   (match_operand:DF 2 "register_operand" "f")]
-                  UNSPEC_CABS_EQ))]
-  "TARGET_MIPS3D"
-  "cabs.eq.d\t%Q0,%1,%2"
-  [(set_attr "type" "fcmp")
-   (set_attr "mode" "FPSW")])
-
-(define_insn "mips_cabs_ueq_d"
-  [(set (match_operand:CC 0 "register_operand" "=z")
-       (unspec:CC [(match_operand:DF 1 "register_operand" "f")
-                   (match_operand:DF 2 "register_operand" "f")]
-                  UNSPEC_CABS_UEQ))]
-  "TARGET_MIPS3D"
-  "cabs.ueq.d\t%Q0,%1,%2"
-  [(set_attr "type" "fcmp")
-   (set_attr "mode" "FPSW")])
-
-(define_insn "mips_cabs_olt_d"
-  [(set (match_operand:CC 0 "register_operand" "=z")
-       (unspec:CC [(match_operand:DF 1 "register_operand" "f")
-                   (match_operand:DF 2 "register_operand" "f")]
-                  UNSPEC_CABS_OLT))]
-  "TARGET_MIPS3D"
-  "cabs.olt.d\t%Q0,%1,%2"
-  [(set_attr "type" "fcmp")
-   (set_attr "mode" "FPSW")])
-
-(define_insn "mips_cabs_ult_d"
-  [(set (match_operand:CC 0 "register_operand" "=z")
-       (unspec:CC [(match_operand:DF 1 "register_operand" "f")
-                   (match_operand:DF 2 "register_operand" "f")]
-                  UNSPEC_CABS_ULT))]
-  "TARGET_MIPS3D"
-  "cabs.ult.d\t%Q0,%1,%2"
-  [(set_attr "type" "fcmp")
-   (set_attr "mode" "FPSW")])
-
-(define_insn "mips_cabs_ole_d"
-  [(set (match_operand:CC 0 "register_operand" "=z")
-       (unspec:CC [(match_operand:DF 1 "register_operand" "f")
-                   (match_operand:DF 2 "register_operand" "f")]
-                  UNSPEC_CABS_OLE))]
-  "TARGET_MIPS3D"
-  "cabs.ole.d\t%Q0,%1,%2"
-  [(set_attr "type" "fcmp")
-   (set_attr "mode" "FPSW")])
-
-(define_insn "mips_cabs_ule_d"
-  [(set (match_operand:CC 0 "register_operand" "=z")
-       (unspec:CC [(match_operand:DF 1 "register_operand" "f")
-                   (match_operand:DF 2 "register_operand" "f")]
-                  UNSPEC_CABS_ULE))]
-  "TARGET_MIPS3D"
-  "cabs.ule.d\t%Q0,%1,%2"
-  [(set_attr "type" "fcmp")
-   (set_attr "mode" "FPSW")])
-
-(define_insn "mips_cabs_sf_d"
-  [(set (match_operand:CC 0 "register_operand" "=z")
-       (unspec:CC [(match_operand:DF 1 "register_operand" "f")
-                   (match_operand:DF 2 "register_operand" "f")]
-                  UNSPEC_CABS_SF))]
-  "TARGET_MIPS3D"
-  "cabs.sf.d\t%Q0,%1,%2"
-  [(set_attr "type" "fcmp")
-   (set_attr "mode" "FPSW")])
-
-(define_insn "mips_cabs_ngle_d"
-  [(set (match_operand:CC 0 "register_operand" "=z")
-       (unspec:CC [(match_operand:DF 1 "register_operand" "f")
-                   (match_operand:DF 2 "register_operand" "f")]
-                  UNSPEC_CABS_NGLE))]
-  "TARGET_MIPS3D"
-  "cabs.ngle.d\t%Q0,%1,%2"
-  [(set_attr "type" "fcmp")
-   (set_attr "mode" "FPSW")])
-
-(define_insn "mips_cabs_seq_d"
-  [(set (match_operand:CC 0 "register_operand" "=z")
-       (unspec:CC [(match_operand:DF 1 "register_operand" "f")
-                   (match_operand:DF 2 "register_operand" "f")]
-                  UNSPEC_CABS_SEQ))]
-  "TARGET_MIPS3D"
-  "cabs.seq.d\t%Q0,%1,%2"
-  [(set_attr "type" "fcmp")
-   (set_attr "mode" "FPSW")])
-
-(define_insn "mips_cabs_ngl_d"
-  [(set (match_operand:CC 0 "register_operand" "=z")
-       (unspec:CC [(match_operand:DF 1 "register_operand" "f")
-                   (match_operand:DF 2 "register_operand" "f")]
-                  UNSPEC_CABS_NGL))]
-  "TARGET_MIPS3D"
-  "cabs.ngl.d\t%Q0,%1,%2"
-  [(set_attr "type" "fcmp")
-   (set_attr "mode" "FPSW")])
-
-(define_insn "mips_cabs_lt_d"
-  [(set (match_operand:CC 0 "register_operand" "=z")
-       (unspec:CC [(match_operand:DF 1 "register_operand" "f")
-                   (match_operand:DF 2 "register_operand" "f")]
-                  UNSPEC_CABS_LT))]
-  "TARGET_MIPS3D"
-  "cabs.lt.d\t%Q0,%1,%2"
-  [(set_attr "type" "fcmp")
-   (set_attr "mode" "FPSW")])
-
-(define_insn "mips_cabs_nge_d"
-  [(set (match_operand:CC 0 "register_operand" "=z")
-       (unspec:CC [(match_operand:DF 1 "register_operand" "f")
-                   (match_operand:DF 2 "register_operand" "f")]
-                  UNSPEC_CABS_NGE))]
-  "TARGET_MIPS3D"
-  "cabs.nge.d\t%Q0,%1,%2"
-  [(set_attr "type" "fcmp")
-   (set_attr "mode" "FPSW")])
-
-(define_insn "mips_cabs_le_d"
-  [(set (match_operand:CC 0 "register_operand" "=z")
-       (unspec:CC [(match_operand:DF 1 "register_operand" "f")
-                   (match_operand:DF 2 "register_operand" "f")]
-                  UNSPEC_CABS_LE))]
-  "TARGET_MIPS3D"
-  "cabs.le.d\t%Q0,%1,%2"
-  [(set_attr "type" "fcmp")
-   (set_attr "mode" "FPSW")])
-
-(define_insn "mips_cabs_ngt_d"
-  [(set (match_operand:CC 0 "register_operand" "=z")
-       (unspec:CC [(match_operand:DF 1 "register_operand" "f")
-                   (match_operand:DF 2 "register_operand" "f")]
-                  UNSPEC_CABS_NGT))]
-  "TARGET_MIPS3D"
-  "cabs.ngt.d\t%Q0,%1,%2"
-  [(set_attr "type" "fcmp")
-   (set_attr "mode" "FPSW")])
-
-;----------------------------------------------------------------------------
-; Floating Point Comparisions for Four Singles
-;----------------------------------------------------------------------------
-
-(define_insn "mips_c_f_4s"
-  [(set (match_operand:CCV4 0 "register_operand" "=z")
-       (unspec:CCV4 [(match_operand:V2SF 1 "register_operand" "f")
-                     (match_operand:V2SF 2 "register_operand" "f")
-                     (match_operand:V2SF 3 "register_operand" "f")
-                     (match_operand:V2SF 4 "register_operand" "f")]
-                    UNSPEC_C_F))]
-  "TARGET_PAIRED_SINGLE_FLOAT"
-  "c.f.ps\t%v0,%1,%2\n\tc.f.ps\t%V0,%3,%4"
-  [(set_attr "type" "fcmp")
-   (set_attr "length" "8")
-   (set_attr "mode" "FPSW")])
-
-(define_insn "mips_c_un_4s"
-  [(set (match_operand:CCV4 0 "register_operand" "=z")
-       (unspec:CCV4 [(match_operand:V2SF 1 "register_operand" "f")
-                     (match_operand:V2SF 2 "register_operand" "f")
-                     (match_operand:V2SF 3 "register_operand" "f")
-                     (match_operand:V2SF 4 "register_operand" "f")]
-                    UNSPEC_C_UN))]
-  "TARGET_PAIRED_SINGLE_FLOAT"
-  "c.un.ps\t%v0,%1,%2\n\tc.un.ps\t%V0,%3,%4"
-  [(set_attr "type" "fcmp")
-   (set_attr "length" "8")
-   (set_attr "mode" "FPSW")])
-
-(define_insn "mips_c_eq_4s"
-  [(set (match_operand:CCV4 0 "register_operand" "=z")
-       (unspec:CCV4 [(match_operand:V2SF 1 "register_operand" "f")
-                     (match_operand:V2SF 2 "register_operand" "f")
-                     (match_operand:V2SF 3 "register_operand" "f")
-                     (match_operand:V2SF 4 "register_operand" "f")]
-                    UNSPEC_C_EQ))]
-  "TARGET_PAIRED_SINGLE_FLOAT"
-  "c.eq.ps\t%v0,%1,%2\n\tc.eq.ps\t%V0,%3,%4"
-  [(set_attr "type" "fcmp")
-   (set_attr "length" "8")
-   (set_attr "mode" "FPSW")])
-
-(define_insn "mips_c_ueq_4s"
-  [(set (match_operand:CCV4 0 "register_operand" "=z")
-       (unspec:CCV4 [(match_operand:V2SF 1 "register_operand" "f")
-                     (match_operand:V2SF 2 "register_operand" "f")
-                     (match_operand:V2SF 3 "register_operand" "f")
-                     (match_operand:V2SF 4 "register_operand" "f")]
-                    UNSPEC_C_UEQ))]
-  "TARGET_PAIRED_SINGLE_FLOAT"
-  "c.ueq.ps\t%v0,%1,%2\n\tc.ueq.ps\t%V0,%3,%4"
-  [(set_attr "type" "fcmp")
-   (set_attr "length" "8")
-   (set_attr "mode" "FPSW")])
-
-(define_insn "mips_c_olt_4s"
-  [(set (match_operand:CCV4 0 "register_operand" "=z")
-       (unspec:CCV4 [(match_operand:V2SF 1 "register_operand" "f")
-                     (match_operand:V2SF 2 "register_operand" "f")
-                     (match_operand:V2SF 3 "register_operand" "f")
-                     (match_operand:V2SF 4 "register_operand" "f")]
-                    UNSPEC_C_OLT))]
-  "TARGET_PAIRED_SINGLE_FLOAT"
-  "c.olt.ps\t%v0,%1,%2\n\tc.olt.ps\t%V0,%3,%4"
-  [(set_attr "type" "fcmp")
-   (set_attr "length" "8")
-   (set_attr "mode" "FPSW")])
-
-(define_insn "mips_c_ult_4s"
-  [(set (match_operand:CCV4 0 "register_operand" "=z")
-       (unspec:CCV4 [(match_operand:V2SF 1 "register_operand" "f")
-                     (match_operand:V2SF 2 "register_operand" "f")
-                     (match_operand:V2SF 3 "register_operand" "f")
-                     (match_operand:V2SF 4 "register_operand" "f")]
-                    UNSPEC_C_ULT))]
-  "TARGET_PAIRED_SINGLE_FLOAT"
-  "c.ult.ps\t%v0,%1,%2\n\tc.ult.ps\t%V0,%3,%4"
-  [(set_attr "type" "fcmp")
-   (set_attr "length" "8")
-   (set_attr "mode" "FPSW")])
-
-(define_insn "mips_c_ole_4s"
-  [(set (match_operand:CCV4 0 "register_operand" "=z")
-       (unspec:CCV4 [(match_operand:V2SF 1 "register_operand" "f")
-                     (match_operand:V2SF 2 "register_operand" "f")
-                     (match_operand:V2SF 3 "register_operand" "f")
-                     (match_operand:V2SF 4 "register_operand" "f")]
-                    UNSPEC_C_OLE))]
-  "TARGET_PAIRED_SINGLE_FLOAT"
-  "c.ole.ps\t%v0,%1,%2\n\tc.ole.ps\t%V0,%3,%4"
-  [(set_attr "type" "fcmp")
-   (set_attr "length" "8")
-   (set_attr "mode" "FPSW")])
-
-(define_insn "mips_c_ule_4s"
-  [(set (match_operand:CCV4 0 "register_operand" "=z")
-       (unspec:CCV4 [(match_operand:V2SF 1 "register_operand" "f")
-                     (match_operand:V2SF 2 "register_operand" "f")
-                     (match_operand:V2SF 3 "register_operand" "f")
-                     (match_operand:V2SF 4 "register_operand" "f")]
-                    UNSPEC_C_ULE))]
-  "TARGET_PAIRED_SINGLE_FLOAT"
-  "c.ule.ps\t%v0,%1,%2\n\tc.ule.ps\t%V0,%3,%4"
-  [(set_attr "type" "fcmp")
-   (set_attr "length" "8")
-   (set_attr "mode" "FPSW")])
-
-(define_insn "mips_c_sf_4s"
-  [(set (match_operand:CCV4 0 "register_operand" "=z")
-       (unspec:CCV4 [(match_operand:V2SF 1 "register_operand" "f")
-                     (match_operand:V2SF 2 "register_operand" "f")
-                     (match_operand:V2SF 3 "register_operand" "f")
-                     (match_operand:V2SF 4 "register_operand" "f")]
-                    UNSPEC_C_SF))]
-  "TARGET_PAIRED_SINGLE_FLOAT"
-  "c.sf.ps\t%v0,%1,%2\n\tc.sf.ps\t%V0,%3,%4"
-  [(set_attr "type" "fcmp")
-   (set_attr "length" "8")
-   (set_attr "mode" "FPSW")])
-
-(define_insn "mips_c_ngle_4s"
-  [(set (match_operand:CCV4 0 "register_operand" "=z")
-       (unspec:CCV4 [(match_operand:V2SF 1 "register_operand" "f")
-                     (match_operand:V2SF 2 "register_operand" "f")
-                     (match_operand:V2SF 3 "register_operand" "f")
-                     (match_operand:V2SF 4 "register_operand" "f")]
-                    UNSPEC_C_NGLE))]
-  "TARGET_PAIRED_SINGLE_FLOAT"
-  "c.ngle.ps\t%v0,%1,%2\n\tc.ngle.ps\t%V0,%3,%4"
-  [(set_attr "type" "fcmp")
-   (set_attr "length" "8")
-   (set_attr "mode" "FPSW")])
-
-(define_insn "mips_c_seq_4s"
-  [(set (match_operand:CCV4 0 "register_operand" "=z")
-       (unspec:CCV4 [(match_operand:V2SF 1 "register_operand" "f")
-                     (match_operand:V2SF 2 "register_operand" "f")
-                     (match_operand:V2SF 3 "register_operand" "f")
-                     (match_operand:V2SF 4 "register_operand" "f")]
-                    UNSPEC_C_SEQ))]
-  "TARGET_PAIRED_SINGLE_FLOAT"
-  "c.seq.ps\t%v0,%1,%2\n\tc.seq.ps\t%V0,%3,%4"
-  [(set_attr "type" "fcmp")
-   (set_attr "length" "8")
-   (set_attr "mode" "FPSW")])
-
-(define_insn "mips_c_ngl_4s"
-  [(set (match_operand:CCV4 0 "register_operand" "=z")
-       (unspec:CCV4 [(match_operand:V2SF 1 "register_operand" "f")
-                     (match_operand:V2SF 2 "register_operand" "f")
-                     (match_operand:V2SF 3 "register_operand" "f")
-                     (match_operand:V2SF 4 "register_operand" "f")]
-                    UNSPEC_C_NGL))]
-  "TARGET_PAIRED_SINGLE_FLOAT"
-  "c.ngl.ps\t%v0,%1,%2\n\tc.ngl.ps\t%V0,%3,%4"
-  [(set_attr "type" "fcmp")
-   (set_attr "length" "8")
-   (set_attr "mode" "FPSW")])
-
-(define_insn "mips_c_lt_4s"
-  [(set (match_operand:CCV4 0 "register_operand" "=z")
-       (unspec:CCV4 [(match_operand:V2SF 1 "register_operand" "f")
-                     (match_operand:V2SF 2 "register_operand" "f")
-                     (match_operand:V2SF 3 "register_operand" "f")
-                     (match_operand:V2SF 4 "register_operand" "f")]
-                    UNSPEC_C_LT))]
-  "TARGET_PAIRED_SINGLE_FLOAT"
-  "c.lt.ps\t%v0,%1,%2\n\tc.lt.ps\t%V0,%3,%4"
-  [(set_attr "type" "fcmp")
-   (set_attr "length" "8")
-   (set_attr "mode" "FPSW")])
-
-(define_insn "mips_c_nge_4s"
-  [(set (match_operand:CCV4 0 "register_operand" "=z")
-       (unspec:CCV4 [(match_operand:V2SF 1 "register_operand" "f")
-                     (match_operand:V2SF 2 "register_operand" "f")
-                     (match_operand:V2SF 3 "register_operand" "f")
-                     (match_operand:V2SF 4 "register_operand" "f")]
-                    UNSPEC_C_NGE))]
-  "TARGET_PAIRED_SINGLE_FLOAT"
-  "c.nge.ps\t%v0,%1,%2\n\tc.nge.ps\t%V0,%3,%4"
-  [(set_attr "type" "fcmp")
-   (set_attr "length" "8")
-   (set_attr "mode" "FPSW")])
-
-(define_insn "mips_c_le_4s"
-  [(set (match_operand:CCV4 0 "register_operand" "=z")
-       (unspec:CCV4 [(match_operand:V2SF 1 "register_operand" "f")
-                     (match_operand:V2SF 2 "register_operand" "f")
-                     (match_operand:V2SF 3 "register_operand" "f")
-                     (match_operand:V2SF 4 "register_operand" "f")]
-                    UNSPEC_C_LE))]
-  "TARGET_PAIRED_SINGLE_FLOAT"
-  "c.le.ps\t%v0,%1,%2\n\tc.le.ps\t%V0,%3,%4"
-  [(set_attr "type" "fcmp")
-   (set_attr "length" "8")
-   (set_attr "mode" "FPSW")])
-
-(define_insn "mips_c_ngt_4s"
-  [(set (match_operand:CCV4 0 "register_operand" "=z")
-       (unspec:CCV4 [(match_operand:V2SF 1 "register_operand" "f")
-                     (match_operand:V2SF 2 "register_operand" "f")
-                     (match_operand:V2SF 3 "register_operand" "f")
-                     (match_operand:V2SF 4 "register_operand" "f")]
-                    UNSPEC_C_NGT))]
-  "TARGET_PAIRED_SINGLE_FLOAT"
-  "c.ngt.ps\t%v0,%1,%2\n\tc.ngt.ps\t%V0,%3,%4"
-  [(set_attr "type" "fcmp")
-   (set_attr "length" "8")
-   (set_attr "mode" "FPSW")])
-
-;----------------------------------------------------------------------------
-; Floating Point Absolute Comparisions for Four Singles
-;----------------------------------------------------------------------------
-(define_insn "mips_cabs_f_4s"
-  [(set (match_operand:CCV4 0 "register_operand" "=z")
-       (unspec:CCV4 [(match_operand:V2SF 1 "register_operand" "f")
-                     (match_operand:V2SF 2 "register_operand" "f")
-                     (match_operand:V2SF 3 "register_operand" "f")
-                     (match_operand:V2SF 4 "register_operand" "f")]
-                    UNSPEC_CABS_F))]
-  "TARGET_MIPS3D"
-  "cabs.f.ps\t%v0,%1,%2\n\tcabs.f.ps\t%V0,%3,%4"
-  [(set_attr "type" "fcmp")
-   (set_attr "length" "8")
-   (set_attr "mode" "FPSW")])
-
-(define_insn "mips_cabs_un_4s"
-  [(set (match_operand:CCV4 0 "register_operand" "=z")
-       (unspec:CCV4 [(match_operand:V2SF 1 "register_operand" "f")
-                     (match_operand:V2SF 2 "register_operand" "f")
-                     (match_operand:V2SF 3 "register_operand" "f")
-                     (match_operand:V2SF 4 "register_operand" "f")]
-                    UNSPEC_CABS_UN))]
-  "TARGET_MIPS3D"
-  "cabs.un.ps\t%v0,%1,%2\n\tcabs.un.ps\t%V0,%3,%4"
-  [(set_attr "type" "fcmp")
-   (set_attr "length" "8")
-   (set_attr "mode" "FPSW")])
-
-(define_insn "mips_cabs_eq_4s"
-  [(set (match_operand:CCV4 0 "register_operand" "=z")
-       (unspec:CCV4 [(match_operand:V2SF 1 "register_operand" "f")
-                     (match_operand:V2SF 2 "register_operand" "f")
-                     (match_operand:V2SF 3 "register_operand" "f")
-                     (match_operand:V2SF 4 "register_operand" "f")]
-                    UNSPEC_CABS_EQ))]
-  "TARGET_MIPS3D"
-  "cabs.eq.ps\t%v0,%1,%2\n\tcabs.eq.ps\t%V0,%3,%4"
-  [(set_attr "type" "fcmp")
-   (set_attr "length" "8")
-   (set_attr "mode" "FPSW")])
-
-(define_insn "mips_cabs_ueq_4s"
-  [(set (match_operand:CCV4 0 "register_operand" "=z")
-       (unspec:CCV4 [(match_operand:V2SF 1 "register_operand" "f")
-                     (match_operand:V2SF 2 "register_operand" "f")
-                     (match_operand:V2SF 3 "register_operand" "f")
-                     (match_operand:V2SF 4 "register_operand" "f")]
-                    UNSPEC_CABS_UEQ))]
-  "TARGET_MIPS3D"
-  "cabs.ueq.ps\t%v0,%1,%2\n\tcabs.ueq.ps\t%V0,%3,%4"
-  [(set_attr "type" "fcmp")
-   (set_attr "length" "8")
-   (set_attr "mode" "FPSW")])
-
-(define_insn "mips_cabs_olt_4s"
-  [(set (match_operand:CCV4 0 "register_operand" "=z")
-       (unspec:CCV4 [(match_operand:V2SF 1 "register_operand" "f")
-                     (match_operand:V2SF 2 "register_operand" "f")
-                     (match_operand:V2SF 3 "register_operand" "f")
-                     (match_operand:V2SF 4 "register_operand" "f")]
-                    UNSPEC_CABS_OLT))]
-  "TARGET_MIPS3D"
-  "cabs.olt.ps\t%v0,%1,%2\n\tcabs.olt.ps\t%V0,%3,%4"
-  [(set_attr "type" "fcmp")
-   (set_attr "length" "8")
-   (set_attr "mode" "FPSW")])
-
-(define_insn "mips_cabs_ult_4s"
-  [(set (match_operand:CCV4 0 "register_operand" "=z")
-       (unspec:CCV4 [(match_operand:V2SF 1 "register_operand" "f")
-                     (match_operand:V2SF 2 "register_operand" "f")
-                     (match_operand:V2SF 3 "register_operand" "f")
-                     (match_operand:V2SF 4 "register_operand" "f")]
-                    UNSPEC_CABS_ULT))]
-  "TARGET_MIPS3D"
-  "cabs.ult.ps\t%v0,%1,%2\n\tcabs.ult.ps\t%V0,%3,%4"
-  [(set_attr "type" "fcmp")
-   (set_attr "length" "8")
-   (set_attr "mode" "FPSW")])
-
-(define_insn "mips_cabs_ole_4s"
-  [(set (match_operand:CCV4 0 "register_operand" "=z")
-       (unspec:CCV4 [(match_operand:V2SF 1 "register_operand" "f")
-                     (match_operand:V2SF 2 "register_operand" "f")
-                     (match_operand:V2SF 3 "register_operand" "f")
-                     (match_operand:V2SF 4 "register_operand" "f")]
-                    UNSPEC_CABS_OLE))]
-  "TARGET_MIPS3D"
-  "cabs.ole.ps\t%v0,%1,%2\n\tcabs.ole.ps\t%V0,%3,%4"
-  [(set_attr "type" "fcmp")
-   (set_attr "length" "8")
-   (set_attr "mode" "FPSW")])
-
-(define_insn "mips_cabs_ule_4s"
-  [(set (match_operand:CCV4 0 "register_operand" "=z")
-       (unspec:CCV4 [(match_operand:V2SF 1 "register_operand" "f")
-                     (match_operand:V2SF 2 "register_operand" "f")
-                     (match_operand:V2SF 3 "register_operand" "f")
-                     (match_operand:V2SF 4 "register_operand" "f")]
-                    UNSPEC_CABS_ULE))]
-  "TARGET_MIPS3D"
-  "cabs.ule.ps\t%v0,%1,%2\n\tcabs.ule.ps\t%V0,%3,%4"
-  [(set_attr "type" "fcmp")
-   (set_attr "length" "8")
-   (set_attr "mode" "FPSW")])
-
-(define_insn "mips_cabs_sf_4s"
-  [(set (match_operand:CCV4 0 "register_operand" "=z")
-       (unspec:CCV4 [(match_operand:V2SF 1 "register_operand" "f")
-                     (match_operand:V2SF 2 "register_operand" "f")
-                     (match_operand:V2SF 3 "register_operand" "f")
-                     (match_operand:V2SF 4 "register_operand" "f")]
-                    UNSPEC_CABS_SF))]
-  "TARGET_MIPS3D"
-  "cabs.sf.ps\t%v0,%1,%2\n\tcabs.sf.ps\t%V0,%3,%4"
-  [(set_attr "type" "fcmp")
-   (set_attr "length" "8")
-   (set_attr "mode" "FPSW")])
-
-(define_insn "mips_cabs_ngle_4s"
-  [(set (match_operand:CCV4 0 "register_operand" "=z")
-       (unspec:CCV4 [(match_operand:V2SF 1 "register_operand" "f")
-                     (match_operand:V2SF 2 "register_operand" "f")
-                     (match_operand:V2SF 3 "register_operand" "f")
-                     (match_operand:V2SF 4 "register_operand" "f")]
-                    UNSPEC_CABS_NGLE))]
-  "TARGET_MIPS3D"
-  "cabs.ngle.ps\t%v0,%1,%2\n\tcabs.ngle.ps\t%V0,%3,%4"
-  [(set_attr "type" "fcmp")
-   (set_attr "length" "8")
-   (set_attr "mode" "FPSW")])
-
-(define_insn "mips_cabs_seq_4s"
-  [(set (match_operand:CCV4 0 "register_operand" "=z")
-       (unspec:CCV4 [(match_operand:V2SF 1 "register_operand" "f")
-                     (match_operand:V2SF 2 "register_operand" "f")
-                     (match_operand:V2SF 3 "register_operand" "f")
-                     (match_operand:V2SF 4 "register_operand" "f")]
-                    UNSPEC_CABS_SEQ))]
-  "TARGET_MIPS3D"
-  "cabs.seq.ps\t%v0,%1,%2\n\tcabs.seq.ps\t%V0,%3,%4"
-  [(set_attr "type" "fcmp")
-   (set_attr "length" "8")
-   (set_attr "mode" "FPSW")])
-
-(define_insn "mips_cabs_ngl_4s"
-  [(set (match_operand:CCV4 0 "register_operand" "=z")
-       (unspec:CCV4 [(match_operand:V2SF 1 "register_operand" "f")
-                     (match_operand:V2SF 2 "register_operand" "f")
-                     (match_operand:V2SF 3 "register_operand" "f")
-                     (match_operand:V2SF 4 "register_operand" "f")]
-                    UNSPEC_CABS_NGL))]
-  "TARGET_MIPS3D"
-  "cabs.ngl.ps\t%v0,%1,%2\n\tcabs.ngl.ps\t%V0,%3,%4"
-  [(set_attr "type" "fcmp")
-   (set_attr "length" "8")
-   (set_attr "mode" "FPSW")])
 
-(define_insn "mips_cabs_lt_4s"
-  [(set (match_operand:CCV4 0 "register_operand" "=z")
-       (unspec:CCV4 [(match_operand:V2SF 1 "register_operand" "f")
-                     (match_operand:V2SF 2 "register_operand" "f")
-                     (match_operand:V2SF 3 "register_operand" "f")
-                     (match_operand:V2SF 4 "register_operand" "f")]
-                    UNSPEC_CABS_LT))]
-  "TARGET_MIPS3D"
-  "cabs.lt.ps\t%v0,%1,%2\n\tcabs.lt.ps\t%V0,%3,%4"
-  [(set_attr "type" "fcmp")
-   (set_attr "length" "8")
-   (set_attr "mode" "FPSW")])
+;----------------------------------------------------------------------------
+; Floating Point Comparisions for Four Singles
+;----------------------------------------------------------------------------
 
-(define_insn "mips_cabs_nge_4s"
+(define_insn_and_split "mips_c_cond_4s"
   [(set (match_operand:CCV4 0 "register_operand" "=z")
        (unspec:CCV4 [(match_operand:V2SF 1 "register_operand" "f")
                      (match_operand:V2SF 2 "register_operand" "f")
                      (match_operand:V2SF 3 "register_operand" "f")
-                     (match_operand:V2SF 4 "register_operand" "f")]
-                    UNSPEC_CABS_NGE))]
-  "TARGET_MIPS3D"
-  "cabs.nge.ps\t%v0,%1,%2\n\tcabs.nge.ps\t%V0,%3,%4"
+                     (match_operand:V2SF 4 "register_operand" "f")
+                     (match_operand 5 "const_int_operand" "")]
+                    UNSPEC_C))]
+  "TARGET_PAIRED_SINGLE_FLOAT"
+  "#"
+  "&& reload_completed"
+  [(set (match_dup 6)
+       (unspec:CCV2 [(match_dup 1)
+                     (match_dup 2)
+                     (match_dup 5)]
+                    UNSPEC_C))
+   (set (match_dup 7)
+       (unspec:CCV2 [(match_dup 3)
+                     (match_dup 4)
+                     (match_dup 5)]
+                    UNSPEC_C))]
+{
+  operands[6] = simplify_gen_subreg (CCV2mode, operands[0], CCV4mode, 0);
+  operands[7] = simplify_gen_subreg (CCV2mode, operands[0], CCV4mode, 8);
+}
   [(set_attr "type" "fcmp")
    (set_attr "length" "8")
    (set_attr "mode" "FPSW")])
 
-(define_insn "mips_cabs_le_4s"
+(define_insn_and_split "mips_cabs_cond_4s"
   [(set (match_operand:CCV4 0 "register_operand" "=z")
        (unspec:CCV4 [(match_operand:V2SF 1 "register_operand" "f")
                      (match_operand:V2SF 2 "register_operand" "f")
                      (match_operand:V2SF 3 "register_operand" "f")
-                     (match_operand:V2SF 4 "register_operand" "f")]
-                    UNSPEC_CABS_LE))]
+                     (match_operand:V2SF 4 "register_operand" "f")
+                     (match_operand 5 "const_int_operand" "")]
+                    UNSPEC_CABS))]
   "TARGET_MIPS3D"
-  "cabs.le.ps\t%v0,%1,%2\n\tcabs.le.ps\t%V0,%3,%4"
+  "#"
+  "&& reload_completed"
+  [(set (match_dup 6)
+       (unspec:CCV2 [(match_dup 1)
+                     (match_dup 2)
+                     (match_dup 5)]
+                    UNSPEC_CABS))
+   (set (match_dup 7)
+       (unspec:CCV2 [(match_dup 3)
+                     (match_dup 4)
+                     (match_dup 5)]
+                    UNSPEC_CABS))]
+{
+  operands[6] = simplify_gen_subreg (CCV2mode, operands[0], CCV4mode, 0);
+  operands[7] = simplify_gen_subreg (CCV2mode, operands[0], CCV4mode, 8);
+}
   [(set_attr "type" "fcmp")
    (set_attr "length" "8")
    (set_attr "mode" "FPSW")])
 
-(define_insn "mips_cabs_ngt_4s"
-  [(set (match_operand:CCV4 0 "register_operand" "=z")
-       (unspec:CCV4 [(match_operand:V2SF 1 "register_operand" "f")
-                     (match_operand:V2SF 2 "register_operand" "f")
-                     (match_operand:V2SF 3 "register_operand" "f")
-                     (match_operand:V2SF 4 "register_operand" "f")]
-                    UNSPEC_CABS_NGT))]
-  "TARGET_MIPS3D"
-  "cabs.ngt.ps\t%v0,%1,%2\n\tcabs.ngt.ps\t%V0,%3,%4"
-  [(set_attr "type" "fcmp")
-   (set_attr "length" "8")
-   (set_attr "mode" "FPSW")])
 
 ;----------------------------------------------------------------------------
 ; Floating Point Comparisions for Paired Singles
 ;----------------------------------------------------------------------------
-(define_insn "mips_c_f_ps"
-  [(set (match_operand:CCV2 0 "register_operand" "=z")
-       (unspec:CCV2 [(match_operand:V2SF 1 "register_operand" "f")
-                     (match_operand:V2SF 2 "register_operand" "f")] 
-                    UNSPEC_C_F))]
-  "TARGET_PAIRED_SINGLE_FLOAT"
-  "c.f.ps\t%Z0%1,%2"
-  [(set_attr "type" "fcmp")
-   (set_attr "mode" "FPSW")])
-
-(define_insn "mips_c_un_ps"
-  [(set (match_operand:CCV2 0 "register_operand" "=z")
-       (unspec:CCV2 [(match_operand:V2SF 1 "register_operand" "f")
-                     (match_operand:V2SF 2 "register_operand" "f")] 
-                    UNSPEC_C_UN))]
-  "TARGET_PAIRED_SINGLE_FLOAT"
-  "c.un.ps\t%Z0%1,%2"
-  [(set_attr "type" "fcmp")
-   (set_attr "mode" "FPSW")])
-
-(define_insn "mips_c_eq_ps"
-  [(set (match_operand:CCV2 0 "register_operand" "=z")
-       (unspec:CCV2 [(match_operand:V2SF 1 "register_operand" "f")
-                     (match_operand:V2SF 2 "register_operand" "f")] 
-                    UNSPEC_C_EQ))]
-  "TARGET_PAIRED_SINGLE_FLOAT"
-  "c.eq.ps\t%Z0%1,%2"
-  [(set_attr "type" "fcmp")
-   (set_attr "mode" "FPSW")])
-
-(define_insn "mips_c_ueq_ps"
-  [(set (match_operand:CCV2 0 "register_operand" "=z")
-       (unspec:CCV2 [(match_operand:V2SF 1 "register_operand" "f")
-                     (match_operand:V2SF 2 "register_operand" "f")] 
-                    UNSPEC_C_UEQ))]
-  "TARGET_PAIRED_SINGLE_FLOAT"
-  "c.ueq.ps\t%Z0%1,%2"
-  [(set_attr "type" "fcmp")
-   (set_attr "mode" "FPSW")])
-
-(define_insn "mips_c_olt_ps"
-  [(set (match_operand:CCV2 0 "register_operand" "=z")
-       (unspec:CCV2 [(match_operand:V2SF 1 "register_operand" "f")
-                     (match_operand:V2SF 2 "register_operand" "f")] 
-                    UNSPEC_C_OLT))]
-  "TARGET_PAIRED_SINGLE_FLOAT"
-  "c.olt.ps\t%Z0%1,%2"
-  [(set_attr "type" "fcmp")
-   (set_attr "mode" "FPSW")])
-
-(define_insn "mips_c_ult_ps"
-  [(set (match_operand:CCV2 0 "register_operand" "=z")
-       (unspec:CCV2 [(match_operand:V2SF 1 "register_operand" "f")
-                     (match_operand:V2SF 2 "register_operand" "f")] 
-                    UNSPEC_C_ULT))]
-  "TARGET_PAIRED_SINGLE_FLOAT"
-  "c.ult.ps\t%Z0%1,%2"
-  [(set_attr "type" "fcmp")
-   (set_attr "mode" "FPSW")])
-
-(define_insn "mips_c_ole_ps"
-  [(set (match_operand:CCV2 0 "register_operand" "=z")
-       (unspec:CCV2 [(match_operand:V2SF 1 "register_operand" "f")
-                     (match_operand:V2SF 2 "register_operand" "f")] 
-                    UNSPEC_C_OLE))]
-  "TARGET_PAIRED_SINGLE_FLOAT"
-  "c.ole.ps\t%Z0%1,%2"
-  [(set_attr "type" "fcmp")
-   (set_attr "mode" "FPSW")])
-
-(define_insn "mips_c_ule_ps"
-  [(set (match_operand:CCV2 0 "register_operand" "=z")
-       (unspec:CCV2 [(match_operand:V2SF 1 "register_operand" "f")
-                     (match_operand:V2SF 2 "register_operand" "f")] 
-                    UNSPEC_C_ULE))]
-  "TARGET_PAIRED_SINGLE_FLOAT"
-  "c.ule.ps\t%Z0%1,%2"
-  [(set_attr "type" "fcmp")
-   (set_attr "mode" "FPSW")])
-
-(define_insn "mips_c_sf_ps"
-  [(set (match_operand:CCV2 0 "register_operand" "=z")
-       (unspec:CCV2 [(match_operand:V2SF 1 "register_operand" "f")
-                     (match_operand:V2SF 2 "register_operand" "f")] 
-                    UNSPEC_C_SF))]
-  "TARGET_PAIRED_SINGLE_FLOAT"
-  "c.sf.ps\t%Z0%1,%2"
-  [(set_attr "type" "fcmp")
-   (set_attr "mode" "FPSW")])
-
-(define_insn "mips_c_ngle_ps"
-  [(set (match_operand:CCV2 0 "register_operand" "=z")
-       (unspec:CCV2 [(match_operand:V2SF 1 "register_operand" "f")
-                     (match_operand:V2SF 2 "register_operand" "f")] 
-                    UNSPEC_C_NGLE))]
-  "TARGET_PAIRED_SINGLE_FLOAT"
-  "c.ngle.ps\t%Z0%1,%2"
-  [(set_attr "type" "fcmp")
-   (set_attr "mode" "FPSW")])
-
-(define_insn "mips_c_seq_ps"
-  [(set (match_operand:CCV2 0 "register_operand" "=z")
-       (unspec:CCV2 [(match_operand:V2SF 1 "register_operand" "f")
-                     (match_operand:V2SF 2 "register_operand" "f")] 
-                    UNSPEC_C_SEQ))]
-  "TARGET_PAIRED_SINGLE_FLOAT"
-  "c.seq.ps\t%Z0%1,%2"
-  [(set_attr "type" "fcmp")
-   (set_attr "mode" "FPSW")])
-
-(define_insn "mips_c_ngl_ps"
-  [(set (match_operand:CCV2 0 "register_operand" "=z")
-       (unspec:CCV2 [(match_operand:V2SF 1 "register_operand" "f")
-                     (match_operand:V2SF 2 "register_operand" "f")] 
-                    UNSPEC_C_NGL))]
-  "TARGET_PAIRED_SINGLE_FLOAT"
-  "c.ngl.ps\t%Z0%1,%2"
-  [(set_attr "type" "fcmp")
-   (set_attr "mode" "FPSW")])
-
-(define_insn "mips_c_lt_ps"
-  [(set (match_operand:CCV2 0 "register_operand" "=z")
-       (unspec:CCV2 [(match_operand:V2SF 1 "register_operand" "f")
-                     (match_operand:V2SF 2 "register_operand" "f")] 
-                    UNSPEC_C_LT))]
-  "TARGET_PAIRED_SINGLE_FLOAT"
-  "c.lt.ps\t%Z0%1,%2"
-  [(set_attr "type" "fcmp")
-   (set_attr "mode" "FPSW")])
-
-(define_insn "mips_c_nge_ps"
-  [(set (match_operand:CCV2 0 "register_operand" "=z")
-       (unspec:CCV2 [(match_operand:V2SF 1 "register_operand" "f")
-                     (match_operand:V2SF 2 "register_operand" "f")] 
-                    UNSPEC_C_NGE))]
-  "TARGET_PAIRED_SINGLE_FLOAT"
-  "c.nge.ps\t%Z0%1,%2"
-  [(set_attr "type" "fcmp")
-   (set_attr "mode" "FPSW")])
-
-(define_insn "mips_c_le_ps"
-  [(set (match_operand:CCV2 0 "register_operand" "=z")
-       (unspec:CCV2 [(match_operand:V2SF 1 "register_operand" "f")
-                     (match_operand:V2SF 2 "register_operand" "f")] 
-                    UNSPEC_C_LE))]
-  "TARGET_PAIRED_SINGLE_FLOAT"
-  "c.le.ps\t%Z0%1,%2"
-  [(set_attr "type" "fcmp")
-   (set_attr "mode" "FPSW")])
 
-(define_insn "mips_c_ngt_ps"
+(define_insn "mips_c_cond_ps"
   [(set (match_operand:CCV2 0 "register_operand" "=z")
        (unspec:CCV2 [(match_operand:V2SF 1 "register_operand" "f")
-                     (match_operand:V2SF 2 "register_operand" "f")] 
-                    UNSPEC_C_NGT))]
+                     (match_operand:V2SF 2 "register_operand" "f")
+                     (match_operand 3 "const_int_operand" "")]
+                    UNSPEC_C))]
   "TARGET_PAIRED_SINGLE_FLOAT"
-  "c.ngt.ps\t%Z0%1,%2"
-  [(set_attr "type" "fcmp")
-   (set_attr "mode" "FPSW")])
-
-;----------------------------------------------------------------------------
-; Floating Point Absolute Comparisions for Paired Singles
-;----------------------------------------------------------------------------
-(define_insn "mips_cabs_f_ps"
-  [(set (match_operand:CCV2 0 "register_operand" "=z")
-       (unspec:CCV2 [(match_operand:V2SF 1 "register_operand" "f")
-                     (match_operand:V2SF 2 "register_operand" "f")] 
-                    UNSPEC_CABS_F))]
-  "TARGET_MIPS3D"
-  "cabs.f.ps\t%Q0,%1,%2"
-  [(set_attr "type" "fcmp")
-   (set_attr "mode" "FPSW")])
-
-(define_insn "mips_cabs_un_ps"
-  [(set (match_operand:CCV2 0 "register_operand" "=z")
-       (unspec:CCV2 [(match_operand:V2SF 1 "register_operand" "f")
-                     (match_operand:V2SF 2 "register_operand" "f")] 
-                    UNSPEC_CABS_UN))]
-  "TARGET_MIPS3D"
-  "cabs.un.ps\t%Q0,%1,%2"
-  [(set_attr "type" "fcmp")
-   (set_attr "mode" "FPSW")])
-
-(define_insn "mips_cabs_eq_ps"
-  [(set (match_operand:CCV2 0 "register_operand" "=z")
-       (unspec:CCV2 [(match_operand:V2SF 1 "register_operand" "f")
-                     (match_operand:V2SF 2 "register_operand" "f")] 
-                    UNSPEC_CABS_EQ))]
-  "TARGET_MIPS3D"
-  "cabs.eq.ps\t%Q0,%1,%2"
-  [(set_attr "type" "fcmp")
-   (set_attr "mode" "FPSW")])
-
-(define_insn "mips_cabs_ueq_ps"
-  [(set (match_operand:CCV2 0 "register_operand" "=z")
-       (unspec:CCV2 [(match_operand:V2SF 1 "register_operand" "f")
-                     (match_operand:V2SF 2 "register_operand" "f")] 
-                    UNSPEC_CABS_UEQ))]
-  "TARGET_MIPS3D"
-  "cabs.ueq.ps\t%Q0,%1,%2"
-  [(set_attr "type" "fcmp")
-   (set_attr "mode" "FPSW")])
-
-(define_insn "mips_cabs_olt_ps"
-  [(set (match_operand:CCV2 0 "register_operand" "=z")
-       (unspec:CCV2 [(match_operand:V2SF 1 "register_operand" "f")
-                     (match_operand:V2SF 2 "register_operand" "f")] 
-                    UNSPEC_CABS_OLT))]
-  "TARGET_MIPS3D"
-  "cabs.olt.ps\t%Q0,%1,%2"
-  [(set_attr "type" "fcmp")
-   (set_attr "mode" "FPSW")])
-
-(define_insn "mips_cabs_ult_ps"
-  [(set (match_operand:CCV2 0 "register_operand" "=z")
-       (unspec:CCV2 [(match_operand:V2SF 1 "register_operand" "f")
-                     (match_operand:V2SF 2 "register_operand" "f")] 
-                    UNSPEC_CABS_ULT))]
-  "TARGET_MIPS3D"
-  "cabs.ult.ps\t%Q0,%1,%2"
-  [(set_attr "type" "fcmp")
-   (set_attr "mode" "FPSW")])
-
-(define_insn "mips_cabs_ole_ps"
-  [(set (match_operand:CCV2 0 "register_operand" "=z")
-       (unspec:CCV2 [(match_operand:V2SF 1 "register_operand" "f")
-                     (match_operand:V2SF 2 "register_operand" "f")] 
-                    UNSPEC_CABS_OLE))]
-  "TARGET_MIPS3D"
-  "cabs.ole.ps\t%Q0,%1,%2"
-  [(set_attr "type" "fcmp")
-   (set_attr "mode" "FPSW")])
-
-(define_insn "mips_cabs_ule_ps"
-  [(set (match_operand:CCV2 0 "register_operand" "=z")
-       (unspec:CCV2 [(match_operand:V2SF 1 "register_operand" "f")
-                     (match_operand:V2SF 2 "register_operand" "f")] 
-                    UNSPEC_CABS_ULE))]
-  "TARGET_MIPS3D"
-  "cabs.ule.ps\t%Q0,%1,%2"
-  [(set_attr "type" "fcmp")
-   (set_attr "mode" "FPSW")])
-
-(define_insn "mips_cabs_sf_ps"
-  [(set (match_operand:CCV2 0 "register_operand" "=z")
-       (unspec:CCV2 [(match_operand:V2SF 1 "register_operand" "f")
-                     (match_operand:V2SF 2 "register_operand" "f")] 
-                    UNSPEC_CABS_SF))]
-  "TARGET_MIPS3D"
-  "cabs.sf.ps\t%Q0,%1,%2"
-  [(set_attr "type" "fcmp")
-   (set_attr "mode" "FPSW")])
-
-(define_insn "mips_cabs_ngle_ps"
-  [(set (match_operand:CCV2 0 "register_operand" "=z")
-       (unspec:CCV2 [(match_operand:V2SF 1 "register_operand" "f")
-                     (match_operand:V2SF 2 "register_operand" "f")] 
-                    UNSPEC_CABS_NGLE))]
-  "TARGET_MIPS3D"
-  "cabs.ngle.ps\t%Q0,%1,%2"
-  [(set_attr "type" "fcmp")
-   (set_attr "mode" "FPSW")])
-
-(define_insn "mips_cabs_seq_ps"
-  [(set (match_operand:CCV2 0 "register_operand" "=z")
-       (unspec:CCV2 [(match_operand:V2SF 1 "register_operand" "f")
-                     (match_operand:V2SF 2 "register_operand" "f")] 
-                    UNSPEC_CABS_SEQ))]
-  "TARGET_MIPS3D"
-  "cabs.seq.ps\t%Q0,%1,%2"
-  [(set_attr "type" "fcmp")
-   (set_attr "mode" "FPSW")])
-
-(define_insn "mips_cabs_ngl_ps"
-  [(set (match_operand:CCV2 0 "register_operand" "=z")
-       (unspec:CCV2 [(match_operand:V2SF 1 "register_operand" "f")
-                     (match_operand:V2SF 2 "register_operand" "f")] 
-                    UNSPEC_CABS_NGL))]
-  "TARGET_MIPS3D"
-  "cabs.ngl.ps\t%Q0,%1,%2"
-  [(set_attr "type" "fcmp")
-   (set_attr "mode" "FPSW")])
-
-(define_insn "mips_cabs_lt_ps"
-  [(set (match_operand:CCV2 0 "register_operand" "=z")
-       (unspec:CCV2 [(match_operand:V2SF 1 "register_operand" "f")
-                     (match_operand:V2SF 2 "register_operand" "f")] 
-                    UNSPEC_CABS_LT))]
-  "TARGET_MIPS3D"
-  "cabs.lt.ps\t%Q0,%1,%2"
-  [(set_attr "type" "fcmp")
-   (set_attr "mode" "FPSW")])
-
-(define_insn "mips_cabs_nge_ps"
-  [(set (match_operand:CCV2 0 "register_operand" "=z")
-       (unspec:CCV2 [(match_operand:V2SF 1 "register_operand" "f")
-                     (match_operand:V2SF 2 "register_operand" "f")] 
-                    UNSPEC_CABS_NGE))]
-  "TARGET_MIPS3D"
-  "cabs.nge.ps\t%Q0,%1,%2"
+  "c.%Y3.ps\t%0,%1,%2"
   [(set_attr "type" "fcmp")
    (set_attr "mode" "FPSW")])
 
-(define_insn "mips_cabs_le_ps"
+(define_insn "mips_cabs_cond_ps"
   [(set (match_operand:CCV2 0 "register_operand" "=z")
        (unspec:CCV2 [(match_operand:V2SF 1 "register_operand" "f")
-                     (match_operand:V2SF 2 "register_operand" "f")] 
-                    UNSPEC_CABS_LE))]
+                     (match_operand:V2SF 2 "register_operand" "f")
+                     (match_operand 3 "const_int_operand" "")]
+                    UNSPEC_CABS))]
   "TARGET_MIPS3D"
-  "cabs.le.ps\t%Q0,%1,%2"
+  "cabs.%Y3.ps\t%0,%1,%2"
   [(set_attr "type" "fcmp")
    (set_attr "mode" "FPSW")])
 
-(define_insn "mips_cabs_ngt_ps"
-  [(set (match_operand:CCV2 0 "register_operand" "=z")
-       (unspec:CCV2 [(match_operand:V2SF 1 "register_operand" "f")
-                     (match_operand:V2SF 2 "register_operand" "f")] 
-                    UNSPEC_CABS_NGT))]
-  "TARGET_MIPS3D"
-  "cabs.ngt.ps\t%Q0,%1,%2"
-  [(set_attr "type" "fcmp")
-   (set_attr "mode" "FPSW")])
 
 ;----------------------------------------------------------------------------
 ; Floating Point Branch Instructions.
@@ -1364,7 +394,7 @@
                      (label_ref (match_operand 1 "" ""))
                      (pc)))]
   "TARGET_MIPS3D"
-  "%*bc1any4t\t%Q0,%1%/"
+  "%*bc1any4t\t%0,%1%/"
   [(set_attr "type" "branch")
    (set_attr "mode" "none")])
 
@@ -1376,7 +406,7 @@
                      (label_ref (match_operand 1 "" ""))
                      (pc)))]
   "TARGET_MIPS3D"
-  "%*bc1any4f\t%Q0,%1%/"
+  "%*bc1any4f\t%0,%1%/"
   [(set_attr "type" "branch")
    (set_attr "mode" "none")])
 
@@ -1388,7 +418,7 @@
                      (label_ref (match_operand 1 "" ""))
                      (pc)))]
   "TARGET_MIPS3D"
-  "%*bc1any2t\t%Q0,%1%/"
+  "%*bc1any2t\t%0,%1%/"
   [(set_attr "type" "branch")
    (set_attr "mode" "none")])
 
@@ -1400,7 +430,7 @@
                      (label_ref (match_operand 1 "" ""))
                      (pc)))]
   "TARGET_MIPS3D"
-  "%*bc1any2f\t%Q0,%1%/"
+  "%*bc1any2f\t%0,%1%/"
   [(set_attr "type" "branch")
    (set_attr "mode" "none")])
 
diff --git a/gcc/config/mips/mips.c b/gcc/config/mips/mips.c
index 88bed78ea83c8672b18e7186bcb1612b2a018f3b..cad42a7db726f03939673678d66c7526f294694e 100644 (file)
--- a/gcc/config/mips/mips.c
+++ b/gcc/config/mips/mips.c
@@ -188,6 +188,37 @@ enum mips_builtin_type
   MIPS_BUILTIN_CMP_SINGLE
 };
 
+/* Invokes MACRO (COND) for each c.cond.fmt condition.  */
+#define MIPS_FP_CONDITIONS(MACRO) \
+  MACRO (f),   \
+  MACRO (un),  \
+  MACRO (eq),  \
+  MACRO (ueq), \
+  MACRO (olt), \
+  MACRO (ult), \
+  MACRO (ole), \
+  MACRO (ule), \
+  MACRO (sf),  \
+  MACRO (ngle),        \
+  MACRO (seq), \
+  MACRO (ngl), \
+  MACRO (lt),  \
+  MACRO (nge), \
+  MACRO (le),  \
+  MACRO (ngt)
+
+/* Enumerates the codes above as MIPS_FP_COND_<X>.  */
+#define DECLARE_MIPS_COND(X) MIPS_FP_COND_ ## X
+enum mips_fp_condition {
+  MIPS_FP_CONDITIONS (DECLARE_MIPS_COND)
+};
+
+/* Index X provides the string representation of MIPS_FP_COND_<X>.  */
+#define STRINGIFY(X) #X
+static const char *const mips_fp_conditions[] = {
+  MIPS_FP_CONDITIONS (STRINGIFY)
+};
+
 /* A function to save or store a register.  The first argument is the
    register and the second is the stack slot.  */
 typedef void (*mips_save_restore_fn) (rtx, rtx);
@@ -325,9 +356,11 @@ static rtx mips_expand_builtin (tree, rtx, rtx, enum machine_mode, int);
 static void mips_init_builtins (void);
 static rtx mips_expand_builtin_direct (enum insn_code, rtx, tree);
 static rtx mips_expand_builtin_movtf (enum mips_builtin_type,
-                                     enum insn_code, rtx, tree);
+                                     enum insn_code, enum mips_fp_condition,
+                                     rtx, tree);
 static rtx mips_expand_builtin_compare (enum mips_builtin_type,
-                                       enum insn_code, rtx, tree);
+                                       enum insn_code, enum mips_fp_condition,
+                                       rtx, tree);
 
 /* Structure to be filled in by compute_frame_size with register
    save masks, and offsets for the current function.  */
@@ -4586,31 +4619,6 @@ mips_debugger_offset (rtx addr, HOST_WIDE_INT offset)
   return offset;
 }
 \f
-/* A helper function for print_operand.  This prints out a floating point
-   condition code register.  OP is the operand we are printing.  CODE is the
-   rtx code of OP.  ALIGN is the required register alignment for OP.  OFFSET
-   is the index into operand for multiple register operands.  If IGNORE is
-   true, then we only print the register name if it isn't fcc0, and we
-   follow it with a comma.  */
-
-static void
-print_fcc_operand (FILE *file, rtx op, enum rtx_code code,
-                  int align, int offset, int ignore)
-{
-  int regnum;
-
-  if (code != REG)
-    abort ();
-
-  regnum = REGNO (op);
-  if (!ST_REG_P (regnum)
-      || (regnum - ST_REG_FIRST) % align != 0)
-    abort ();
-
-  if (!ignore || regnum != ST_REG_FIRST)
-    fprintf (file, "%s%s", reg_names[regnum+offset], (ignore ? "," : ""));
-}
-
 /* Implement the PRINT_OPERAND macro.  The MIPS-specific operand codes are:
 
    'X'  OP is CONST_INT, prints 32 bits in hexadecimal format = "0x%08x",
@@ -4628,13 +4636,9 @@ print_fcc_operand (FILE *file, rtx op, enum rtx_code code,
    'T'  print 'f' for (eq:CC ...), 't' for (ne:CC ...),
              'z' for (eq:?I ...), 'n' for (ne:?I ...).
    't'  like 'T', but with the EQ/NE cases reversed
-   'Z'  print register and a comma, but print nothing for $fcc0
+   'Y'  for a CONST_INT X, print mips_fp_conditions[X]
+   'Z'  print the operand and a comma for ISA_HAS_8CC, otherwise print nothing
    'R'  print the reloc associated with LO_SUM
-   'V'  Check if the fcc register number divided by 4 is zero.  Then print 
-        the fcc register plus 2.
-   'v'  Check if the fcc register number divided by 4 is zero.  Then print 
-        the fcc register.
-   'Q'  print the fcc register.
 
    The punctuation characters are:
 
@@ -4866,17 +4870,24 @@ print_operand (FILE *file, rtx op, int letter)
   else if (letter == 'R')
     print_operand_reloc (file, op, mips_lo_relocs);
 
-  else if (letter == 'Z')
-    print_fcc_operand (file, op, code, 1, 0, 1);
-
-  else if (letter == 'V')
-    print_fcc_operand (file, op, code, 4, 2, 0);
-
-  else if (letter == 'v')
-    print_fcc_operand (file, op, code, 4, 0, 0);
+  else if (letter == 'Y')
+    {
+      if (GET_CODE (op) == CONST_INT
+         && ((unsigned HOST_WIDE_INT) INTVAL (op)
+             < ARRAY_SIZE (mips_fp_conditions)))
+       fputs (mips_fp_conditions[INTVAL (op)], file);
+      else
+       output_operand_lossage ("invalid %%Y value");
+    }
 
-  else if (letter == 'Q')
-    print_fcc_operand (file, op, code, 1, 0, 0);
+  else if (letter == 'Z')
+    {
+      if (ISA_HAS_8CC)
+       {
+         print_operand (file, op, 0);
+         fputc (',', file);
+       }
+    }
 
   else if (code == REG || code == SUBREG)
     {
@@ -9274,6 +9285,9 @@ struct builtin_description
      for more information.  */
   enum insn_code icode;
 
+  /* The floating-point comparison code to use with ICODE, if any.  */
+  enum mips_fp_condition cond;
+
   /* The name of the builtin function.  */
   const char *name;              
 
@@ -9290,60 +9304,69 @@ struct builtin_description
 /* Define a MIPS_BUILTIN_DIRECT function for instruction CODE_FOR_mips_<INSN>.
    FUNCTION_TYPE and TARGET_FLAGS are builtin_description fields.  */
 #define DIRECT_BUILTIN(INSN, FUNCTION_TYPE, TARGET_FLAGS)              \
-  { CODE_FOR_mips_ ## INSN, "__builtin_mips_" #INSN,                   \
+  { CODE_FOR_mips_ ## INSN, 0, "__builtin_mips_" #INSN,                        \
     MIPS_BUILTIN_DIRECT, FUNCTION_TYPE, TARGET_FLAGS }
 
-/* Define builtins for scalar comparison instructions CODE_FOR_mips_<INSN>_s
-   and CODE_FOR_mips_<INSN>_d, both of which require TARGET_FLAGS.  */
-#define CMP_SCALAR_BUILTINS(INSN, TARGET_FLAGS)                                \
-  { CODE_FOR_mips_ ## INSN ## _s, "__builtin_mips_" #INSN "_s",                \
+/* Define __builtin_mips_<INSN>_<COND>_{s,d}, both of which require
+   TARGET_FLAGS.  */
+#define CMP_SCALAR_BUILTINS(INSN, COND, TARGET_FLAGS)                  \
+  { CODE_FOR_mips_ ## INSN ## _cond_s, MIPS_FP_COND_ ## COND,          \
+    "__builtin_mips_" #INSN "_" #COND "_s",                            \
     MIPS_BUILTIN_CMP_SINGLE, MIPS_INT_FTYPE_SF_SF, TARGET_FLAGS },     \
-  { CODE_FOR_mips_ ## INSN ## _d, "__builtin_mips_" #INSN "_d",                \
+  { CODE_FOR_mips_ ## INSN ## _cond_d, MIPS_FP_COND_ ## COND,          \
+    "__builtin_mips_" #INSN "_" #COND "_d",                            \
     MIPS_BUILTIN_CMP_SINGLE, MIPS_INT_FTYPE_DF_DF, TARGET_FLAGS }
 
-/* Define builtins for PS comparison instruction CODE_FOR_mips_<INSN>_ps.
+/* Define __builtin_mips_{any,all,upper,lower}_<INSN>_<COND>_ps.
    The lower and upper forms require TARGET_FLAGS while the any and all
    forms require MASK_MIPS3D.  */
-#define CMP_PS_BUILTINS(INSN, TARGET_FLAGS)                            \
-  { CODE_FOR_mips_ ## INSN ## _ps, "__builtin_mips_any_" #INSN "_ps",  \
+#define CMP_PS_BUILTINS(INSN, COND, TARGET_FLAGS)                      \
+  { CODE_FOR_mips_ ## INSN ## _cond_ps, MIPS_FP_COND_ ## COND,         \
+    "__builtin_mips_any_" #INSN "_" #COND "_ps",                       \
     MIPS_BUILTIN_CMP_ANY, MIPS_INT_FTYPE_V2SF_V2SF, MASK_MIPS3D },     \
-  { CODE_FOR_mips_ ## INSN ## _ps, "__builtin_mips_all_" #INSN "_ps",  \
+  { CODE_FOR_mips_ ## INSN ## _cond_ps, MIPS_FP_COND_ ## COND,         \
+    "__builtin_mips_all_" #INSN "_" #COND "_ps",                       \
     MIPS_BUILTIN_CMP_ALL, MIPS_INT_FTYPE_V2SF_V2SF, MASK_MIPS3D },     \
-  { CODE_FOR_mips_ ## INSN ## _ps, "__builtin_mips_lower_" #INSN "_ps",        \
+  { CODE_FOR_mips_ ## INSN ## _cond_ps, MIPS_FP_COND_ ## COND,         \
+    "__builtin_mips_lower_" #INSN "_" #COND "_ps",                     \
     MIPS_BUILTIN_CMP_LOWER, MIPS_INT_FTYPE_V2SF_V2SF, TARGET_FLAGS },  \
-  { CODE_FOR_mips_ ## INSN ## _ps, "__builtin_mips_upper_" #INSN "_ps",        \
+  { CODE_FOR_mips_ ## INSN ## _cond_ps, MIPS_FP_COND_ ## COND,         \
+    "__builtin_mips_upper_" #INSN "_" #COND "_ps",                     \
     MIPS_BUILTIN_CMP_UPPER, MIPS_INT_FTYPE_V2SF_V2SF, TARGET_FLAGS }
 
-/* Define builtins for instruction CODE_FOR_mips_<INSN>_4s, which compares
-   two pairs of V2SF vectors.  The functions require MASK_MIPS3D.  */
-#define CMP_4S_BUILTINS(INSN)                                          \
-  { CODE_FOR_mips_ ## INSN ## _4s, "__builtin_mips_any_" #INSN "_4s",  \
+/* Define __builtin_mips_{any,all}_<INSN>_<COND>_4s.  The functions
+   require MASK_MIPS3D.  */
+#define CMP_4S_BUILTINS(INSN, COND)                                    \
+  { CODE_FOR_mips_ ## INSN ## _cond_4s, MIPS_FP_COND_ ## COND,         \
+    "__builtin_mips_any_" #INSN "_" #COND "_4s",                       \
     MIPS_BUILTIN_CMP_ANY, MIPS_INT_FTYPE_V2SF_V2SF_V2SF_V2SF,          \
     MASK_MIPS3D },                                                     \
-  { CODE_FOR_mips_ ## INSN ## _4s, "__builtin_mips_all_" #INSN "_4s",  \
+  { CODE_FOR_mips_ ## INSN ## _cond_4s, MIPS_FP_COND_ ## COND,         \
+    "__builtin_mips_all_" #INSN "_" #COND "_4s",                       \
     MIPS_BUILTIN_CMP_ALL, MIPS_INT_FTYPE_V2SF_V2SF_V2SF_V2SF,          \
     MASK_MIPS3D }
 
-/* Define movt and movf builtins that use CODE_FOR_mips_<INSN>_ps as
-   the comparison instruction.  The comparison instruction requires
-   TARGET_FLAGS.  */
-#define MOVTF_BUILTINS(INSN, TARGET_FLAGS)                             \
-  { CODE_FOR_mips_ ## INSN ## _ps, "__builtin_mips_movt_" #INSN "_ps", \
+/* Define __builtin_mips_mov{t,f}_<INSN>_<COND>_ps.  The comparison
+   instruction requires TARGET_FLAGS.  */
+#define MOVTF_BUILTINS(INSN, COND, TARGET_FLAGS)                       \
+  { CODE_FOR_mips_ ## INSN ## _cond_ps, MIPS_FP_COND_ ## COND,         \
+    "__builtin_mips_movt_" #INSN "_" #COND "_ps",                      \
     MIPS_BUILTIN_MOVT, MIPS_V2SF_FTYPE_V2SF_V2SF_V2SF_V2SF,            \
     TARGET_FLAGS },                                                    \
-  { CODE_FOR_mips_ ## INSN ## _ps, "__builtin_mips_movf_" #INSN "_ps", \
+  { CODE_FOR_mips_ ## INSN ## _cond_ps, MIPS_FP_COND_ ## COND,         \
+    "__builtin_mips_movf_" #INSN "_" #COND "_ps",                      \
     MIPS_BUILTIN_MOVF, MIPS_V2SF_FTYPE_V2SF_V2SF_V2SF_V2SF,            \
     TARGET_FLAGS }
 
 /* Define all the builtins related to c.cond.fmt condition COND.  */
 #define CMP_BUILTINS(COND)                                             \
-  MOVTF_BUILTINS (c_ ## COND, MASK_PAIRED_SINGLE),                     \
-  MOVTF_BUILTINS (cabs_ ## COND, MASK_MIPS3D),                         \
-  CMP_SCALAR_BUILTINS (cabs_ ## COND, MASK_MIPS3D),                    \
-  CMP_PS_BUILTINS (c_ ## COND, MASK_PAIRED_SINGLE),                    \
-  CMP_PS_BUILTINS (cabs_ ## COND, MASK_MIPS3D),                                \
-  CMP_4S_BUILTINS (c_ ## COND),                                                \
-  CMP_4S_BUILTINS (cabs_ ## COND)
+  MOVTF_BUILTINS (c, COND, MASK_PAIRED_SINGLE),                                \
+  MOVTF_BUILTINS (cabs, COND, MASK_MIPS3D),                            \
+  CMP_SCALAR_BUILTINS (cabs, COND, MASK_MIPS3D),                       \
+  CMP_PS_BUILTINS (c, COND, MASK_PAIRED_SINGLE),                       \
+  CMP_PS_BUILTINS (cabs, COND, MASK_MIPS3D),                           \
+  CMP_4S_BUILTINS (c, COND),                                           \
+  CMP_4S_BUILTINS (cabs, COND)
 
 /* __builtin_mips_abs_ps() maps to the standard absM2 pattern.  */
 #define CODE_FOR_mips_abs_ps CODE_FOR_absv2sf2
@@ -9379,22 +9402,7 @@ static const struct builtin_description mips_bdesc[] =
   DIRECT_BUILTIN (rsqrt2_d, MIPS_DF_FTYPE_DF_DF, MASK_MIPS3D),
   DIRECT_BUILTIN (rsqrt2_ps, MIPS_V2SF_FTYPE_V2SF_V2SF, MASK_MIPS3D),
 
-  CMP_BUILTINS (f),
-  CMP_BUILTINS (un),
-  CMP_BUILTINS (eq),
-  CMP_BUILTINS (ueq),
-  CMP_BUILTINS (olt),
-  CMP_BUILTINS (ult),
-  CMP_BUILTINS (ole),
-  CMP_BUILTINS (ule),
-  CMP_BUILTINS (sf),
-  CMP_BUILTINS (ngle),
-  CMP_BUILTINS (seq),
-  CMP_BUILTINS (ngl),
-  CMP_BUILTINS (lt),
-  CMP_BUILTINS (nge),
-  CMP_BUILTINS (le),
-  CMP_BUILTINS (ngt)
+  MIPS_FP_CONDITIONS (CMP_BUILTINS)
 };
 
 
@@ -9460,14 +9468,16 @@ mips_expand_builtin (tree exp, rtx target, rtx subtarget ATTRIBUTE_UNUSED,
 
     case MIPS_BUILTIN_MOVT:
     case MIPS_BUILTIN_MOVF:
-      return mips_expand_builtin_movtf (type, icode, target, arglist);
+      return mips_expand_builtin_movtf (type, icode, mips_bdesc[fcode].cond,
+                                       target, arglist);
 
     case MIPS_BUILTIN_CMP_ANY:
     case MIPS_BUILTIN_CMP_ALL:
     case MIPS_BUILTIN_CMP_UPPER:
     case MIPS_BUILTIN_CMP_LOWER:
     case MIPS_BUILTIN_CMP_SINGLE:
-      return mips_expand_builtin_compare (type, icode, target, arglist);
+      return mips_expand_builtin_compare (type, icode, mips_bdesc[fcode].cond,
+                                         target, arglist);
 
     default:
       return 0;
@@ -9587,13 +9597,14 @@ mips_expand_builtin_direct (enum insn_code icode, rtx target, tree arglist)
 }
 
 /* Expand a __builtin_mips_movt_*_ps() or __builtin_mips_movf_*_ps()
-   function (TYPE says which).  ARGLIST is the list of arguments to
-   the function and ICODE says which instruction should be used to
-   compare the first two arguments.  TARGET, if nonnull, suggests a
-   good place to put the result.  */
+   function (TYPE says which).  ARGLIST is the list of arguments to the
+   function, ICODE is the instruction that should be used to compare
+   the first two arguments, and COND is the conditon it should test.
+   TARGET, if nonnull, suggests a good place to put the result.  */
 
 static rtx
-mips_expand_builtin_movtf (enum mips_builtin_type type, enum insn_code icode,
+mips_expand_builtin_movtf (enum mips_builtin_type type,
+                          enum insn_code icode, enum mips_fp_condition cond,
                           rtx target, tree arglist)
 {
   rtx cmp_result, op0, op1;
@@ -9601,7 +9612,7 @@ mips_expand_builtin_movtf (enum mips_builtin_type type, enum insn_code icode,
   cmp_result = mips_prepare_builtin_target (icode, 0, 0);
   op0 = mips_prepare_builtin_arg (icode, 1, &arglist);
   op1 = mips_prepare_builtin_arg (icode, 2, &arglist);
-  emit_insn (GEN_FCN (icode) (cmp_result, op0, op1));
+  emit_insn (GEN_FCN (icode) (cmp_result, op0, op1, GEN_INT (cond)));
 
   icode = CODE_FOR_mips_cond_move_tf_ps;
   target = mips_prepare_builtin_target (icode, 0, target);
@@ -9619,13 +9630,15 @@ mips_expand_builtin_movtf (enum mips_builtin_type type, enum insn_code icode,
   return target;
 }
 
-/* Expand a comparison builtin of type BUILTIN_TYPE.  ICODE is the code of
-   the comparison instruction and ARGLIST is the list of function arguments.
-   TARGET, if nonnull, suggests a good place to put the boolean result.  */
+/* Expand a comparison builtin of type BUILTIN_TYPE.  ICODE is the code
+   of the comparison instruction and COND is the condition it should test.
+   ARGLIST is the list of function arguments and TARGET, if nonnull,
+   suggests a good place to put the boolean result.  */
 
 static rtx
 mips_expand_builtin_compare (enum mips_builtin_type builtin_type,
-                            enum insn_code icode, rtx target, tree arglist)
+                            enum insn_code icode, enum mips_fp_condition cond,
+                            rtx target, tree arglist)
 {
   rtx label1, label2, if_then_else;
   rtx pat, cmp_result, ops[MAX_RECOG_OPERANDS];
@@ -9637,17 +9650,18 @@ mips_expand_builtin_compare (enum mips_builtin_type builtin_type,
 
   /* Prepare the operands to the comparison.  */
   cmp_result = mips_prepare_builtin_target (icode, 0, 0);
-  for (i = 1; i < insn_data[icode].n_operands; i++)
+  for (i = 1; i < insn_data[icode].n_operands - 1; i++)
     ops[i] = mips_prepare_builtin_arg (icode, i, &arglist);
 
   switch (insn_data[icode].n_operands)
     {
-    case 3:
-      pat = GEN_FCN (icode) (cmp_result, ops[1], ops[2]);
+    case 4:
+      pat = GEN_FCN (icode) (cmp_result, ops[1], ops[2], GEN_INT (cond));
       break;
 
-    case 5:
-      pat = GEN_FCN (icode) (cmp_result, ops[1], ops[2], ops[3], ops[4]);
+    case 6:
+      pat = GEN_FCN (icode) (cmp_result, ops[1], ops[2],
+                            ops[3], ops[4], GEN_INT (cond));
       break;
 
     default:
diff --git a/gcc/config/mips/mips.md b/gcc/config/mips/mips.md
index 4256a5bb7880ba35214ed8e75d8cc2af7a63b71e..037ee042e9b7f37f86f2df37fbf509af97e5a16b 100644 (file)
--- a/gcc/config/mips/mips.md
+++ b/gcc/config/mips/mips.md
@@ -53,54 +53,23 @@
    ;; For MIPS Paired-Singled Floating Point Instructions.
 
    (UNSPEC_MOVE_TF_PS          200)
-   (UNSPEC_C_F                 201)
-   (UNSPEC_C_UN                        202)
-   (UNSPEC_C_EQ                        203)
-   (UNSPEC_C_UEQ               204)
-   (UNSPEC_C_OLT               205)
-   (UNSPEC_C_ULT               206)
-   (UNSPEC_C_OLE               207)
-   (UNSPEC_C_ULE               208)
-   (UNSPEC_C_SF                        209)
-   (UNSPEC_C_NGLE              210)
-   (UNSPEC_C_SEQ               211)
-   (UNSPEC_C_NGL               212)
-   (UNSPEC_C_LT                        213)
-   (UNSPEC_C_NGE               214)
-   (UNSPEC_C_LE                        215)
-   (UNSPEC_C_NGT               216)
+   (UNSPEC_C                   201)
 
    ;; MIPS64/MIPS32R2 alnv.ps
-   (UNSPEC_ALNV_PS             217)
+   (UNSPEC_ALNV_PS             202)
 
    ;; MIPS-3D instructions
+   (UNSPEC_CABS                        203)
 
-   (UNSPEC_CABS_F              218)
-   (UNSPEC_CABS_UN             219)
-   (UNSPEC_CABS_EQ             220)
-   (UNSPEC_CABS_UEQ            221)
-   (UNSPEC_CABS_OLT            222)
-   (UNSPEC_CABS_ULT            223)
-   (UNSPEC_CABS_OLE            224)
-   (UNSPEC_CABS_ULE            225)
-   (UNSPEC_CABS_SF             226)
-   (UNSPEC_CABS_NGLE           227)
-   (UNSPEC_CABS_SEQ            228)
-   (UNSPEC_CABS_NGL            229)
-   (UNSPEC_CABS_LT             230)
-   (UNSPEC_CABS_NGE            231)
-   (UNSPEC_CABS_LE             232)
-   (UNSPEC_CABS_NGT            233)
-
-   (UNSPEC_ADDR_PS             234)
-   (UNSPEC_CVT_PW_PS           235)
-   (UNSPEC_CVT_PS_PW           236)
-   (UNSPEC_MULR_PS             237)
-
-   (UNSPEC_RSQRT1              238)
-   (UNSPEC_RSQRT2              239)
-   (UNSPEC_RECIP1              240)
-   (UNSPEC_RECIP2              241)
+   (UNSPEC_ADDR_PS             204)
+   (UNSPEC_CVT_PW_PS           205)
+   (UNSPEC_CVT_PS_PW           206)
+   (UNSPEC_MULR_PS             207)
+
+   (UNSPEC_RSQRT1              208)
+   (UNSPEC_RSQRT2              209)
+   (UNSPEC_RECIP1              210)
+   (UNSPEC_RECIP2              211)
   ]
 )