struct pipe_driver_query_info list[] = {
{"num-compilations", R600_QUERY_NUM_COMPILATIONS, {0}, PIPE_DRIVER_QUERY_TYPE_UINT64,
PIPE_DRIVER_QUERY_RESULT_TYPE_CUMULATIVE},
+ {"num-shaders-created", R600_QUERY_NUM_SHADERS_CREATED, {0}, PIPE_DRIVER_QUERY_TYPE_UINT64,
+ PIPE_DRIVER_QUERY_RESULT_TYPE_CUMULATIVE},
{"draw-calls", R600_QUERY_DRAW_CALLS, {0}},
{"requested-VRAM", R600_QUERY_REQUESTED_VRAM, {rscreen->info.vram_size}, PIPE_DRIVER_QUERY_TYPE_BYTES},
{"requested-GTT", R600_QUERY_REQUESTED_GTT, {rscreen->info.gart_size}, PIPE_DRIVER_QUERY_TYPE_BYTES},
#define R600_QUERY_CURRENT_GPU_MCLK (PIPE_QUERY_DRIVER_SPECIFIC + 10)
#define R600_QUERY_GPU_LOAD (PIPE_QUERY_DRIVER_SPECIFIC + 11)
#define R600_QUERY_NUM_COMPILATIONS (PIPE_QUERY_DRIVER_SPECIFIC + 12)
+#define R600_QUERY_NUM_SHADERS_CREATED (PIPE_QUERY_DRIVER_SPECIFIC + 13)
#define R600_CONTEXT_STREAMOUT_FLUSH (1u << 0)
#define R600_CONTEXT_PRIVATE_FLAG (1u << 1)
* compilation and another one for rendering.
*/
unsigned num_compilations;
+ /* Along with ST_DEBUG=precompile, this should show if applications
+ * are loading shaders on demand. This is a monotonic counter.
+ */
+ unsigned num_shaders_created;
/* GPU load thread. */
pipe_mutex gpu_load_mutex;
case R600_QUERY_CURRENT_GPU_MCLK:
case R600_QUERY_GPU_LOAD:
case R600_QUERY_NUM_COMPILATIONS:
+ case R600_QUERY_NUM_SHADERS_CREATED:
return NULL;
}
case R600_QUERY_CURRENT_GPU_MCLK:
case R600_QUERY_GPU_LOAD:
case R600_QUERY_NUM_COMPILATIONS:
+ case R600_QUERY_NUM_SHADERS_CREATED:
skip_allocation = true;
break;
default:
case R600_QUERY_NUM_COMPILATIONS:
rquery->begin_result = p_atomic_read(&rctx->screen->num_compilations);
return true;
+ case R600_QUERY_NUM_SHADERS_CREATED:
+ rquery->begin_result = p_atomic_read(&rctx->screen->num_shaders_created);
+ return true;
}
/* Discard the old query buffers. */
case R600_QUERY_NUM_COMPILATIONS:
rquery->end_result = p_atomic_read(&rctx->screen->num_compilations);
return;
+ case R600_QUERY_NUM_SHADERS_CREATED:
+ rquery->end_result = p_atomic_read(&rctx->screen->num_shaders_created);
+ return;
}
r600_emit_query_end(rctx, rquery);
case R600_QUERY_CURRENT_GPU_SCLK:
case R600_QUERY_CURRENT_GPU_MCLK:
case R600_QUERY_NUM_COMPILATIONS:
+ case R600_QUERY_NUM_SHADERS_CREATED:
result->u64 = query->end_result - query->begin_result;
return TRUE;
case R600_QUERY_GPU_LOAD:
sel->tokens = tgsi_dup_tokens(state->tokens);
sel->so = state->stream_output;
tgsi_scan_shader(state->tokens, &sel->info);
+ p_atomic_inc(&sscreen->b.num_shaders_created);
switch (pipe_shader_type) {
case PIPE_SHADER_GEOMETRY: