*/
unsigned compressed_colortex_counter;
+ /* Atomically increment this counter when an existing texture's
+ * backing buffer or tile mode parameters have changed that requires
+ * recomputation of shader descriptors.
+ */
+ unsigned dirty_tex_descriptor_counter;
+
void (*query_opaque_metadata)(struct r600_common_screen *rscreen,
struct r600_texture *rtex,
struct radeon_bo_metadata *md);
unsigned gpu_reset_counter;
unsigned last_dirty_fb_counter;
unsigned last_compressed_colortex_counter;
+ unsigned last_dirty_tex_descriptor_counter;
struct u_upload_mgr *uploader;
struct u_suballocator *allocator_so_filled_size;
static void si_set_sampler_view(struct si_context *sctx,
struct si_sampler_views *views,
- unsigned slot, struct pipe_sampler_view *view)
+ unsigned slot, struct pipe_sampler_view *view,
+ bool disallow_early_out)
{
struct si_sampler_view *rview = (struct si_sampler_view*)view;
- if (views->views[slot] == view)
+ if (views->views[slot] == view && !disallow_early_out)
return;
if (view) {
if (!views || !views[i]) {
samplers->depth_texture_mask &= ~(1u << slot);
samplers->compressed_colortex_mask &= ~(1u << slot);
- si_set_sampler_view(sctx, &samplers->views, slot, NULL);
+ si_set_sampler_view(sctx, &samplers->views, slot, NULL, false);
continue;
}
- si_set_sampler_view(sctx, &samplers->views, slot, views[i]);
+ si_set_sampler_view(sctx, &samplers->views, slot, views[i], false);
if (views[i]->texture && views[i]->texture->target != PIPE_BUFFER) {
struct r600_texture *rtex =
}
res = (struct r600_resource *)view->resource;
- util_copy_image_view(&images->views[slot], view);
+
+ if (&images->views[slot] != view)
+ util_copy_image_view(&images->views[slot], view);
si_sampler_view_add_buffer(ctx, &res->b.b,
RADEON_USAGE_READWRITE);
}
}
+/* Update mutable image descriptor fields of all bound textures. */
+void si_update_all_texture_descriptors(struct si_context *sctx)
+{
+ unsigned shader;
+
+ for (shader = 0; shader < SI_NUM_SHADERS; shader++) {
+ struct si_sampler_views *samplers = &sctx->samplers[shader].views;
+ struct si_images_info *images = &sctx->images[shader];
+ unsigned mask;
+
+ /* Images. */
+ mask = images->desc.enabled_mask;
+ while (mask) {
+ unsigned i = u_bit_scan(&mask);
+ struct pipe_image_view *view = &images->views[i];
+
+ if (!view->resource ||
+ view->resource->target == PIPE_BUFFER)
+ continue;
+
+ si_set_shader_image(sctx, images, i, view);
+ }
+
+ /* Sampler views. */
+ mask = samplers->desc.enabled_mask;
+ while (mask) {
+ unsigned i = u_bit_scan(&mask);
+ struct pipe_sampler_view *view = samplers->views[i];
+
+ if (!view ||
+ !view->texture ||
+ view->texture->target == PIPE_BUFFER)
+ continue;
+
+ si_set_sampler_view(sctx, samplers, i,
+ samplers->views[i], true);
+ }
+ }
+}
+
/* SHADER USER DATA */
static void si_mark_shader_pointers_dirty(struct si_context *sctx,
struct si_context *sctx = (struct si_context *)ctx;
struct si_state_rasterizer *rs = sctx->queued.named.rasterizer;
struct pipe_index_buffer ib = {};
- unsigned mask, dirty_fb_counter;
+ unsigned mask, dirty_fb_counter, dirty_tex_counter;
if (!info->count && !info->indirect &&
(info->indexed || !info->count_from_stream_output))
si_mark_atom_dirty(sctx, &sctx->framebuffer.atom);
}
+ /* Invalidate & recompute texture descriptors if needed. */
+ dirty_tex_counter = p_atomic_read(&sctx->b.screen->dirty_tex_descriptor_counter);
+ if (dirty_tex_counter != sctx->b.last_dirty_tex_descriptor_counter) {
+ sctx->b.last_dirty_tex_descriptor_counter = dirty_tex_counter;
+ si_update_all_texture_descriptors(sctx);
+ }
+
si_decompress_graphics_textures(sctx);
/* Set the rasterization primitive type.