nvc0/ir: TXQ requires different lowering from normal TEX

diff --git a/src/gallium/drivers/nvc0/codegen/nv50_ir_lowering_nvc0.cpp b/src/gallium/drivers/nvc0/codegen/nv50_ir_lowering_nvc0.cpp
index 93d60cf16c05f81e7e63555147c93aac31778140..94cc511111953e65ed16490bf67d1e7f92124fdf 100644 (file)
--- a/src/gallium/drivers/nvc0/codegen/nv50_ir_lowering_nvc0.cpp
+++ b/src/gallium/drivers/nvc0/codegen/nv50_ir_lowering_nvc0.cpp
@@ -261,6 +261,7 @@ private:
    bool handlePOW(Instruction *);
    bool handleTEX(TexInstruction *);
    bool handleTXD(TexInstruction *);
+   bool handleTXQ(TexInstruction *);
    bool handleManualTXD(TexInstruction *);
 
    void checkPredicate(Instruction *);
@@ -431,6 +432,13 @@ NVC0LoweringPass::handleTXD(TexInstruction *txd)
    return true;
 }
 
+bool
+NVC0LoweringPass::handleTXQ(TexInstruction *txq)
+{
+   // TODO: indirect resource/sampler index
+   return true;
+}
+
 bool
 NVC0LoweringPass::handleWRSV(Instruction *i)
 {
@@ -655,11 +663,12 @@ NVC0LoweringPass::visit(Instruction *i)
    case OP_TXB:
    case OP_TXL:
    case OP_TXF:
-   case OP_TXQ:
    case OP_TXG:
       return handleTEX(i->asTex());
    case OP_TXD:
       return handleTXD(i->asTex());
+   case OP_TXQ:
+     return handleTXQ(i->asTex());
    case OP_EX2:
       bld.mkOp1(OP_PREEX2, TYPE_F32, i->getDef(0), i->getSrc(0));
       i->setSrc(0, i->getDef(0));