* config/h8300/h8300.md (two anonymous patterns): Remove.

From-SVN: r48334

diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index c6c6b921e2a884b9c51f249d3ed910f0e19ae195..ea4b4943d05bbce146a5ad3d343710e0e6475c69 100644 (file)
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,3 +1,7 @@
+2001-12-27  Kazu Hirata  <kazu@hxi.com>
+
+       * config/h8300/h8300.md (two anonymous patterns): Remove.
+
 2001-12-27  Richard Henderson  <rth@redhat.com>
 
        * haifa-sched.c (reemit_other_notes): New.

diff --git a/gcc/config/h8300/h8300.md b/gcc/config/h8300/h8300.md
index 88f02f8be6ded852bd473bc52f2b9ad03573448c..33aa74ba78afab8c0dcb8e48b21e51d876f4d730 100644 (file)
--- a/gcc/config/h8300/h8300.md
+++ b/gcc/config/h8300/h8300.md
@@ -2104,21 +2104,8 @@
 ;;
 ;; Inverted loads with a 32bit destination.
 ;;
-;; Yes, all seven cases are needed.
+;; Yes, all five cases are needed.
 ;;
-(define_insn ""
-  [(set (match_operand:SI 0 "register_operand" "=&r")
-       (and:SI (not:SI
-                 (zero_extend:SI (match_operand:HI 1 "register_operand" "r")))
-               (match_operand:SI 2 "p_operand" "P")))]
-  ""
-  "* return output_simode_bld (1, 1, operands);"
-  [(set_attr "cc" "clobber")
-   (set (attr "length")
-       (if_then_else (eq (symbol_ref "TARGET_H8300H || TARGET_H8300S")
-                         (const_int 0))
-                     (const_int 10)
-                     (const_int 8)))])
 (define_insn ""
   [(set (match_operand:SI 0 "register_operand" "=&r")
        (and:SI (not:SI
@@ -2135,19 +2122,6 @@
                      (const_int 10)
                      (const_int 8)))])
 
-(define_insn ""
-  [(set (match_operand:SI 0 "register_operand" "=&r")
-       (and:SI (not:SI
-                 (zero_extend:SI (match_operand:QI 1 "register_operand" "r")))
-               (match_operand:SI 2 "p_operand" "P")))]
-  ""
-  "* return output_simode_bld (1, 1, operands);"
-  [(set_attr "cc" "clobber")
-   (set (attr "length")
-       (if_then_else (eq (symbol_ref "TARGET_H8300H || TARGET_H8300S")
-                         (const_int 0))
-                     (const_int 10)
-                     (const_int 8)))])
 (define_insn ""
   [(set (match_operand:SI 0 "register_operand" "=&r")
        (and:SI (not:SI