i965/vec4/gen6: fix exec_size for instructions with width of 4 in generate_gs_svb_write()

Signed-off-by: Samuel Iglesias Gonsalvez <siglesias@igalia.com>
Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com>

diff --git a/src/mesa/drivers/dri/i965/brw_vec4_generator.cpp b/src/mesa/drivers/dri/i965/brw_vec4_generator.cpp
index 549b707203fe7575e8d9a6b8d6f73887a2ebee71..871b49ad9ab14f7c37c76fe5d79c27a4628df4aa 100644 (file)
--- a/src/mesa/drivers/dri/i965/brw_vec4_generator.cpp
+++ b/src/mesa/drivers/dri/i965/brw_vec4_generator.cpp
@@ -485,10 +485,13 @@ generate_gs_svb_write(struct brw_codegen *p,
    bool final_write = inst->sol_final_write;
 
    brw_push_insn_state(p);
+   brw_set_default_exec_size(p, BRW_EXECUTE_4);
    /* Copy Vertex data into M0.x */
    brw_MOV(p, stride(dst, 4, 4, 1),
            stride(retype(src0, BRW_REGISTER_TYPE_UD), 4, 4, 1));
+   brw_pop_insn_state(p);
 
+   brw_push_insn_state(p);
    /* Send SVB Write */
    brw_svb_write(p,
                  final_write ? src1 : brw_null_reg(), /* dest == src1 */