rs6000: Use subreg for QI/HI vector init

This patch is to use paradoxical subreg instead of
zero_extend for promoting QI/HI to SI/DI when we
want to construct one vector with these modes.
Since we do the gpr->vsx movement and vector merge
or pack later, the high part is useless and safe to
use paradoxical subreg.  It can avoid useless rlwinms
generated for signed cases.

Bootstrapped/regtested on powerpc64le-linux-gnu P9.

gcc/ChangeLog:

	* config/rs6000/rs6000.c (rs6000_expand_vector_init): Use
	paradoxical subreg instead of zero_extend for QI/HI promotion.

gcc/testsuite/ChangeLog:

	* gcc.target/powerpc/pr96933-1.c: Adjusted to check no rlwinm.
	* gcc.target/powerpc/pr96933-2.c: Likewise.

diff --git a/gcc/config/rs6000/rs6000.c b/gcc/config/rs6000/rs6000.c
index f26fc13484b5a4a2b3984368b26cdc8f2004d5d7..cf172138c2d1bc74f43dc78def8f4fceafcd3f11 100644 (file)
--- a/gcc/config/rs6000/rs6000.c
+++ b/gcc/config/rs6000/rs6000.c
@@ -6806,17 +6806,9 @@ rs6000_expand_vector_init (rtx target, rtx vals)
       /* Force the values into word_mode registers.  */
       for (i = 0; i < n_elts; i++)
        {
-         rtx tmp = force_reg (GET_MODE_INNER (mode), XVECEXP (vals, 0, i));
-         if (TARGET_POWERPC64)
-           {
-             op[i] = gen_reg_rtx (DImode);
-             emit_insn (gen_zero_extendqidi2 (op[i], tmp));
-           }
-         else
-           {
-             op[i] = gen_reg_rtx (SImode);
-             emit_insn (gen_zero_extendqisi2 (op[i], tmp));
-           }
+         rtx tmp = force_reg (inner_mode, XVECEXP (vals, 0, i));
+         machine_mode tmode = TARGET_POWERPC64 ? DImode : SImode;
+         op[i] = simplify_gen_subreg (tmode, tmp, inner_mode, 0);
        }
 
       /* Take unsigned char big endianness on 64bit as example for below

diff --git a/gcc/testsuite/gcc.target/powerpc/pr96933-1.c b/gcc/testsuite/gcc.target/powerpc/pr96933-1.c
index 3b63865b3b8c81bd5f384ab68dde8f2592f71efc..71d72084413e527153678bf3aa451bff39223f59 100644 (file)
--- a/gcc/testsuite/gcc.target/powerpc/pr96933-1.c
+++ b/gcc/testsuite/gcc.target/powerpc/pr96933-1.c
@@ -13,3 +13,4 @@
 /* { dg-final { scan-assembler-times {\mvpkudum\M} 12 } } */
 /* { dg-final { scan-assembler-not {\mstb\M} } } */
 /* { dg-final { scan-assembler-not {\msth\M} } } */
+/* { dg-final { scan-assembler-not {\mrlwinm\M} } } */

diff --git a/gcc/testsuite/gcc.target/powerpc/pr96933-2.c b/gcc/testsuite/gcc.target/powerpc/pr96933-2.c
index cef8fbd4f3583b10267b9b49351c703faed5a22b..9fa15125d8d6bd63adb80188a0592dec75918262 100644 (file)
--- a/gcc/testsuite/gcc.target/powerpc/pr96933-2.c
+++ b/gcc/testsuite/gcc.target/powerpc/pr96933-2.c
@@ -13,3 +13,4 @@
 /* { dg-final { scan-assembler-times {\mxxpermdi\M} 4 } } */
 /* { dg-final { scan-assembler-not {\mstb\M} } } */
 /* { dg-final { scan-assembler-not {\msth\M} } } */
+/* { dg-final { scan-assembler-not {\mrlwinm\M} } } */