ir_dereference *param =
(ir_dereference *) ir->actual_parameters.get_head();
instr->variables[0] = evaluate_deref(&instr->instr, param);
- nir_ssa_dest_init(&instr->instr, &instr->dest, 1, NULL);
+ nir_ssa_dest_init(&instr->instr, &instr->dest, 1, 32, NULL);
nir_builder_instr_insert(&b, &instr->instr);
break;
}
const nir_intrinsic_info *info =
&nir_intrinsic_infos[instr->intrinsic];
nir_ssa_dest_init(&instr->instr, &instr->dest,
- info->dest_components, NULL);
+ info->dest_components, 32, NULL);
}
if (op == nir_intrinsic_image_size ||
nir_builder_instr_insert(&b, &instr->instr);
break;
case nir_intrinsic_shader_clock:
- nir_ssa_dest_init(&instr->instr, &instr->dest, 1, NULL);
+ nir_ssa_dest_init(&instr->instr, &instr->dest, 1, 32, NULL);
nir_builder_instr_insert(&b, &instr->instr);
break;
case nir_intrinsic_store_ssbo: {
/* Setup destination register */
nir_ssa_dest_init(&instr->instr, &instr->dest,
- type->vector_elements, NULL);
+ type->vector_elements, 32, NULL);
/* Insert the created nir instruction now since in the case of boolean
* result we will need to emit another instruction after it
load_ssbo_compare->src[1].swizzle[i] = 0;
nir_ssa_dest_init(&load_ssbo_compare->instr,
&load_ssbo_compare->dest.dest,
- type->vector_elements, NULL);
+ type->vector_elements, 32, NULL);
load_ssbo_compare->dest.write_mask = (1 << type->vector_elements) - 1;
nir_builder_instr_insert(&b, &load_ssbo_compare->instr);
dest = &load_ssbo_compare->dest.dest;
/* Atomic result */
assert(ir->return_deref);
nir_ssa_dest_init(&instr->instr, &instr->dest,
- ir->return_deref->type->vector_elements, NULL);
+ ir->return_deref->type->vector_elements, 32, NULL);
nir_builder_instr_insert(&b, &instr->instr);
break;
}
instr->num_components = type->vector_elements;
/* Setup destination register */
+ unsigned bit_size = glsl_get_bit_size(type->base_type);
nir_ssa_dest_init(&instr->instr, &instr->dest,
- type->vector_elements, NULL);
+ type->vector_elements, bit_size, NULL);
nir_builder_instr_insert(&b, &instr->instr);
break;
/* Atomic result */
assert(ir->return_deref);
+ unsigned bit_size = glsl_get_bit_size(ir->return_deref->type->base_type);
nir_ssa_dest_init(&instr->instr, &instr->dest,
- ir->return_deref->type->vector_elements, NULL);
+ ir->return_deref->type->vector_elements,
+ bit_size, NULL);
nir_builder_instr_insert(&b, &instr->instr);
break;
}
nir_dest *dest = get_instr_dest(instr);
if (dest)
- nir_ssa_dest_init(instr, dest, num_components, NULL);
+ nir_ssa_dest_init(instr, dest, num_components, 32, NULL);
nir_builder_instr_insert(&b, instr);
nir_intrinsic_instr *load =
nir_intrinsic_instr_create(this->shader, nir_intrinsic_load_ubo);
load->num_components = ir->type->vector_elements;
+ load->dest.ssa.bit_size = glsl_get_bit_size(ir->type->base_type);
load->src[0] = nir_src_for_ssa(evaluate_rvalue(ir->operands[0]));
load->src[1] = nir_src_for_ssa(evaluate_rvalue(ir->operands[1]));
add_instr(&load->instr, ir->type->vector_elements);
nir_load_const_instr *instr = ralloc(shader, nir_load_const_instr);
instr_init(&instr->instr, nir_instr_type_load_const);
- nir_ssa_def_init(&instr->instr, &instr->def, num_components, NULL);
+ nir_ssa_def_init(&instr->instr, &instr->def, num_components, 32, NULL);
return instr;
}
nir_ssa_undef_instr *instr = ralloc(shader, nir_ssa_undef_instr);
instr_init(&instr->instr, nir_instr_type_ssa_undef);
- nir_ssa_def_init(&instr->instr, &instr->def, num_components, NULL);
+ nir_ssa_def_init(&instr->instr, &instr->def, num_components, 32, NULL);
return instr;
}
void
nir_ssa_def_init(nir_instr *instr, nir_ssa_def *def,
- unsigned num_components, const char *name)
+ unsigned num_components,
+ unsigned bit_size, const char *name)
{
def->name = name;
def->parent_instr = instr;
list_inithead(&def->uses);
list_inithead(&def->if_uses);
def->num_components = num_components;
- def->bit_size = 32; /* FIXME: Add an input paremeter or guess? */
+ def->bit_size = bit_size;
if (instr->block) {
nir_function_impl *impl =
void
nir_ssa_dest_init(nir_instr *instr, nir_dest *dest,
- unsigned num_components, const char *name)
+ unsigned num_components, unsigned bit_size,
+ const char *name)
{
dest->is_ssa = true;
- nir_ssa_def_init(instr, &dest->ssa, num_components, name);
+ nir_ssa_def_init(instr, &dest->ssa, num_components, bit_size, name);
}
void
nir_dest new_dest);
void nir_ssa_dest_init(nir_instr *instr, nir_dest *dest,
- unsigned num_components, const char *name);
+ unsigned num_components, unsigned bit_size,
+ const char *name);
void nir_ssa_def_init(nir_instr *instr, nir_ssa_def *def,
- unsigned num_components, const char *name);
+ unsigned num_components, unsigned bit_size,
+ const char *name);
void nir_ssa_def_rewrite_uses(nir_ssa_def *def, nir_src new_src);
void nir_ssa_def_rewrite_uses_after(nir_ssa_def *def, nir_src new_src,
nir_instr *after_me);
}
assert(num_components != 0);
+ /* Figure out the bitwidth based on the source bitwidth if the instruction
+ * is variable-width.
+ */
+ unsigned bit_size = nir_alu_type_get_type_size(op_info->output_type);
+ if (bit_size == 0) {
+ for (unsigned i = 0; i < op_info->num_inputs; i++) {
+ unsigned src_bit_size = instr->src[i].src.ssa->bit_size;
+ if (nir_alu_type_get_type_size(op_info->input_types[i]) == 0) {
+ if (bit_size)
+ assert(src_bit_size == bit_size);
+ else
+ bit_size = src_bit_size;
+ } else {
+ assert(src_bit_size ==
+ nir_alu_type_get_type_size(op_info->input_types[i]));
+ }
+ }
+ }
+
/* Make sure we don't swizzle from outside of our source vector (like if a
* scalar value was passed into a multiply with a vector).
*/
}
}
- nir_ssa_dest_init(&instr->instr, &instr->dest.dest, num_components, NULL);
+ nir_ssa_dest_init(&instr->instr, &instr->dest.dest, num_components,
+ bit_size, NULL);
instr->dest.write_mask = (1 << num_components) - 1;
nir_builder_instr_insert(build, &instr->instr);
nir_fmov_alu(nir_builder *build, nir_alu_src src, unsigned num_components)
{
nir_alu_instr *mov = nir_alu_instr_create(build->shader, nir_op_fmov);
- nir_ssa_dest_init(&mov->instr, &mov->dest.dest, num_components, NULL);
+ nir_ssa_dest_init(&mov->instr, &mov->dest.dest, num_components,
+ nir_src_bit_size(src.src), NULL);
mov->dest.write_mask = (1 << num_components) - 1;
mov->src[0] = src;
nir_builder_instr_insert(build, &mov->instr);
nir_imov_alu(nir_builder *build, nir_alu_src src, unsigned num_components)
{
nir_alu_instr *mov = nir_alu_instr_create(build->shader, nir_op_imov);
- nir_ssa_dest_init(&mov->instr, &mov->dest.dest, num_components, NULL);
+ nir_ssa_dest_init(&mov->instr, &mov->dest.dest, num_components,
+ nir_src_bit_size(src.src), NULL);
mov->dest.write_mask = (1 << num_components) - 1;
mov->src[0] = src;
nir_builder_instr_insert(build, &mov->instr);
nir_intrinsic_instr_create(build->shader, nir_intrinsic_load_var);
load->num_components = num_components;
load->variables[0] = nir_deref_var_create(load, var);
- nir_ssa_dest_init(&load->instr, &load->dest, num_components, NULL);
+ nir_ssa_dest_init(&load->instr, &load->dest, num_components,
+ glsl_get_bit_size(glsl_get_base_type(var->type)), NULL);
nir_builder_instr_insert(build, &load->instr);
return &load->dest.ssa;
}
load->num_components = nir_intrinsic_infos[op].dest_components;
load->const_index[0] = index;
nir_ssa_dest_init(&load->instr, &load->dest,
- nir_intrinsic_infos[op].dest_components, NULL);
+ nir_intrinsic_infos[op].dest_components, 32, NULL);
nir_builder_instr_insert(build, &load->instr);
return &load->dest.ssa;
}
{
ndst->is_ssa = dst->is_ssa;
if (dst->is_ssa) {
- nir_ssa_dest_init(ninstr, ndst, dst->ssa.num_components, dst->ssa.name);
+ nir_ssa_dest_init(ninstr, ndst, dst->ssa.num_components,
+ dst->ssa.bit_size, dst->ssa.name);
add_remap(state, &ndst->ssa, &dst->ssa);
} else {
ndst->reg.reg = remap_reg(state, dst->reg.reg);
nir_parallel_copy_entry *entry = rzalloc(state->dead_ctx,
nir_parallel_copy_entry);
nir_ssa_dest_init(&pcopy->instr, &entry->dest,
- phi->dest.ssa.num_components, src->src.ssa->name);
+ phi->dest.ssa.num_components,
+ phi->dest.ssa.bit_size, src->src.ssa->name);
exec_list_push_tail(&pcopy->entries, &entry->node);
assert(src->src.is_ssa);
nir_parallel_copy_entry *entry = rzalloc(state->dead_ctx,
nir_parallel_copy_entry);
nir_ssa_dest_init(&block_pcopy->instr, &entry->dest,
- phi->dest.ssa.num_components, phi->dest.ssa.name);
+ phi->dest.ssa.num_components, phi->dest.ssa.bit_size,
+ phi->dest.ssa.name);
exec_list_push_tail(&block_pcopy->entries, &entry->node);
nir_ssa_def_rewrite_uses(&phi->dest.ssa,
*/
static void
-nir_alu_ssa_dest_init(nir_alu_instr *instr, unsigned num_components)
+nir_alu_ssa_dest_init(nir_alu_instr *instr, unsigned num_components,
+ unsigned bit_size)
{
- nir_ssa_dest_init(&instr->instr, &instr->dest.dest, num_components, NULL);
+ nir_ssa_dest_init(&instr->instr, &instr->dest.dest, num_components,
+ bit_size, NULL);
instr->dest.write_mask = (1 << num_components) - 1;
}
nir_ssa_def *last = NULL;
for (unsigned i = 0; i < num_components; i++) {
nir_alu_instr *chan = nir_alu_instr_create(builder->shader, chan_op);
- nir_alu_ssa_dest_init(chan, 1);
+ nir_alu_ssa_dest_init(chan, 1, instr->dest.dest.ssa.bit_size);
nir_alu_src_copy(&chan->src[0], &instr->src[0], chan);
chan->src[0].swizzle[0] = chan->src[0].swizzle[i];
if (nir_op_infos[chan_op].num_inputs > 1) {
lower->src[i].swizzle[j] = instr->src[i].swizzle[src_chan];
}
- nir_alu_ssa_dest_init(lower, 1);
+ nir_alu_ssa_dest_init(lower, 1, instr->dest.dest.ssa.bit_size);
lower->dest.saturate = instr->dest.saturate;
comps[chan] = &lower->dest.dest.ssa;
nir_instr_insert_before(&instr->instr, &atomic_counter_size->instr);
nir_alu_instr *mul = nir_alu_instr_create(mem_ctx, nir_op_imul);
- nir_ssa_dest_init(&mul->instr, &mul->dest.dest, 1, NULL);
+ nir_ssa_dest_init(&mul->instr, &mul->dest.dest, 1, 32, NULL);
mul->dest.write_mask = 0x1;
nir_src_copy(&mul->src[0].src, &deref_array->indirect, mul);
mul->src[1].src.is_ssa = true;
nir_instr_insert_before(&instr->instr, &mul->instr);
nir_alu_instr *add = nir_alu_instr_create(mem_ctx, nir_op_iadd);
- nir_ssa_dest_init(&add->instr, &add->dest.dest, 1, NULL);
+ nir_ssa_dest_init(&add->instr, &add->dest.dest, 1, 32, NULL);
add->dest.write_mask = 0x1;
add->src[0].src.is_ssa = true;
add->src[0].src.ssa = &mul->dest.dest.ssa;
if (instr->dest.is_ssa) {
nir_ssa_dest_init(&new_instr->instr, &new_instr->dest,
- instr->dest.ssa.num_components, NULL);
+ instr->dest.ssa.num_components, 32, NULL);
nir_ssa_def_rewrite_uses(&instr->dest.ssa,
nir_src_for_ssa(&new_instr->dest.ssa));
} else {
load->num_components = 4;
nir_intrinsic_set_base(load, in->data.driver_location);
load->src[0] = nir_src_for_ssa(nir_imm_int(b, 0));
- nir_ssa_dest_init(&load->instr, &load->dest, 4, NULL);
+ nir_ssa_dest_init(&load->instr, &load->dest, 4, 32, NULL);
nir_builder_instr_insert(b, &load->instr);
val[0] = nir_channel(b, &load->dest.ssa, 0);
if (src == NULL) {
/* We're a load. We need to insert a phi node */
nir_phi_instr *phi = nir_phi_instr_create(b->shader);
+ unsigned bit_size = then_dest->bit_size;
nir_ssa_dest_init(&phi->instr, &phi->dest,
- then_dest->num_components, NULL);
+ then_dest->num_components, bit_size, NULL);
nir_phi_src *src0 = ralloc(phi, nir_phi_src);
src0->pred = nir_cf_node_as_block(nir_if_last_then_node(if_stmt));
load->num_components = orig_instr->num_components;
load->variables[0] =
nir_deref_as_var(nir_copy_deref(load, &deref->deref));
+ unsigned bit_size = orig_instr->dest.ssa.bit_size;
nir_ssa_dest_init(&load->instr, &load->dest,
- load->num_components, NULL);
+ load->num_components, bit_size, NULL);
nir_builder_instr_insert(b, &load->instr);
*dest = &load->dest.ssa;
} else {
if (intrin->dest.is_ssa) {
nir_ssa_dest_init(&load->instr, &load->dest,
- intrin->num_components, NULL);
+ intrin->num_components,
+ intrin->dest.ssa.bit_size, NULL);
nir_ssa_def_rewrite_uses(&intrin->dest.ssa,
nir_src_for_ssa(&load->dest.ssa));
} else {
if (intrin->dest.is_ssa) {
nir_ssa_dest_init(&atomic->instr, &atomic->dest,
- intrin->dest.ssa.num_components, NULL);
+ intrin->dest.ssa.num_components,
+ intrin->dest.ssa.bit_size, NULL);
nir_ssa_def_rewrite_uses(&intrin->dest.ssa,
nir_src_for_ssa(&atomic->dest.ssa));
} else {
mul->src[1].src.is_ssa = true;
mul->src[1].src.ssa = &load_const->def;
mul->dest.write_mask = 1;
- nir_ssa_dest_init(&mul->instr, &mul->dest.dest, 1, NULL);
+ nir_ssa_dest_init(&mul->instr, &mul->dest.dest, 1, 32, NULL);
nir_instr_insert_before(instr, &mul->instr);
src.reg.indirect->is_ssa = true;
add->src[0].src = *src.reg.indirect;
nir_src_copy(&add->src[1].src, &deref_array->indirect, add);
add->dest.write_mask = 1;
- nir_ssa_dest_init(&add->instr, &add->dest.dest, 1, NULL);
+ nir_ssa_dest_init(&add->instr, &add->dest.dest, 1, 32, NULL);
nir_instr_insert_before(instr, &add->instr);
src.reg.indirect->is_ssa = true;
mov->dest.write_mask = (1 << intrin->num_components) - 1;
if (intrin->dest.is_ssa) {
nir_ssa_dest_init(&mov->instr, &mov->dest.dest,
- intrin->num_components, NULL);
+ intrin->num_components,
+ intrin->dest.ssa.bit_size, NULL);
nir_ssa_def_rewrite_uses(&intrin->dest.ssa,
nir_src_for_ssa(&mov->dest.dest.ssa));
} else {
if (!should_lower_phi(phi, state))
continue;
+ unsigned bit_size = phi->dest.ssa.bit_size;
+
/* Create a vecN operation to combine the results. Most of these
* will be redundant, but copy propagation should clean them up for
* us. No need to add the complexity here.
nir_alu_instr *vec = nir_alu_instr_create(state->mem_ctx, vec_op);
nir_ssa_dest_init(&vec->instr, &vec->dest.dest,
- phi->dest.ssa.num_components, NULL);
+ phi->dest.ssa.num_components,
+ bit_size, NULL);
vec->dest.write_mask = (1 << phi->dest.ssa.num_components) - 1;
for (unsigned i = 0; i < phi->dest.ssa.num_components; i++) {
nir_phi_instr *new_phi = nir_phi_instr_create(state->mem_ctx);
- nir_ssa_dest_init(&new_phi->instr, &new_phi->dest, 1, NULL);
+ nir_ssa_dest_init(&new_phi->instr, &new_phi->dest, 1,
+ phi->dest.ssa.bit_size, NULL);
vec->src[i].src = nir_src_for_ssa(&new_phi->dest.ssa);
/* We need to insert a mov to grab the i'th component of src */
nir_alu_instr *mov = nir_alu_instr_create(state->mem_ctx,
nir_op_imov);
- nir_ssa_dest_init(&mov->instr, &mov->dest.dest, 1, NULL);
+ nir_ssa_dest_init(&mov->instr, &mov->dest.dest, 1, bit_size, NULL);
mov->dest.write_mask = 1;
nir_src_copy(&mov->src[0].src, &src->src, state->mem_ctx);
mov->src[0].swizzle[0] = i;
txs->src[0].src = nir_src_for_ssa(nir_imm_int(b, 0));
txs->src[0].src_type = nir_tex_src_lod;
- nir_ssa_dest_init(&txs->instr, &txs->dest, 2, NULL);
+ nir_ssa_dest_init(&txs->instr, &txs->dest, 2, 32, NULL);
nir_builder_instr_insert(b, &txs->instr);
return nir_i2f(b, &txs->dest.ssa);
load->num_components = 4;
nir_intrinsic_set_base(load, in->data.driver_location);
load->src[0] = nir_src_for_ssa(nir_imm_int(b, 0));
- nir_ssa_dest_init(&load->instr, &load->dest, 4, NULL);
+ nir_ssa_dest_init(&load->instr, &load->dest, 4, 32, NULL);
nir_builder_instr_insert(b, &load->instr);
return &load->dest.ssa;
assert(src_tail->type == dest_tail->type);
unsigned num_components = glsl_get_vector_elements(src_tail->type);
+ unsigned bit_size =
+ glsl_get_bit_size(glsl_get_base_type(src_tail->type));
nir_intrinsic_instr *load =
nir_intrinsic_instr_create(mem_ctx, nir_intrinsic_load_var);
load->num_components = num_components;
load->variables[0] = nir_deref_as_var(nir_copy_deref(load, &src_head->deref));
- nir_ssa_dest_init(&load->instr, &load->dest, num_components, NULL);
+ nir_ssa_dest_init(&load->instr, &load->dest, num_components, bit_size,
+ NULL);
nir_instr_insert_before(©_instr->instr, &load->instr);
mov->dest.write_mask = (1 << intrin->num_components) - 1;
nir_ssa_dest_init(&mov->instr, &mov->dest.dest,
- intrin->num_components, NULL);
+ intrin->num_components,
+ intrin->dest.ssa.bit_size, NULL);
nir_instr_insert_before(&intrin->instr, &mov->instr);
nir_instr_remove(&intrin->instr);
if (!node->lower_to_ssa)
continue;
+ unsigned bit_size = glsl_get_bit_size(glsl_get_base_type(node->type));
+
w_start = w_end = 0;
iter_count++;
if (has_already[next->index] < iter_count) {
nir_phi_instr *phi = nir_phi_instr_create(state->shader);
nir_ssa_dest_init(&phi->instr, &phi->dest,
- glsl_get_vector_elements(node->type), NULL);
+ glsl_get_vector_elements(node->type),
+ bit_size, NULL);
nir_instr_insert_before_block(next, &phi->instr);
_mesa_hash_table_insert(state->phi_table, phi, node);
nir_load_const_instr *load =
nir_deref_get_const_initializer_load(state.shader, deref);
nir_ssa_def_init(&load->instr, &load->def,
- glsl_get_vector_elements(node->type), NULL);
+ glsl_get_vector_elements(node->type),
+ glsl_get_bit_size(glsl_get_base_type(node->type)),
+ NULL);
nir_instr_insert_before_cf_list(&impl->body, &load->instr);
def_stack_push(node, &load->def, &state);
}
}
nir_ssa_dest_init(&sel->instr, &sel->dest.dest,
- phi->dest.ssa.num_components, phi->dest.ssa.name);
+ phi->dest.ssa.num_components,
+ phi->dest.ssa.bit_size, phi->dest.ssa.name);
sel->dest.write_mask = (1 << phi->dest.ssa.num_components) - 1;
nir_ssa_def_rewrite_uses(&phi->dest.ssa,
num_components = nir_op_infos[expr->opcode].output_size;
nir_alu_instr *alu = nir_alu_instr_create(mem_ctx, expr->opcode);
- nir_ssa_dest_init(&alu->instr, &alu->dest.dest, num_components, NULL);
+ nir_ssa_dest_init(&alu->instr, &alu->dest.dest, num_components, 32, NULL);
alu->dest.write_mask = (1 << num_components) - 1;
alu->dest.saturate = false;
nir_alu_instr *mov = nir_alu_instr_create(mem_ctx, nir_op_imov);
mov->dest.write_mask = instr->dest.write_mask;
nir_ssa_dest_init(&mov->instr, &mov->dest.dest,
- instr->dest.dest.ssa.num_components, NULL);
+ instr->dest.dest.ssa.num_components,
+ instr->dest.dest.ssa.bit_size, NULL);
mov->src[0] = construct_value(replace, nir_op_infos[instr->op].output_type,
instr->dest.dest.ssa.num_components, &state,
state->states[index].num_defs);
list_del(&dest->reg.def_link);
- nir_ssa_dest_init(state->parent_instr, dest, reg->num_components, name);
+ nir_ssa_dest_init(state->parent_instr, dest, reg->num_components,
+ reg->bit_size, name);
/* push our SSA destination on the stack */
state->states[index].index++;
instr->dest.write_mask = (1 << num_components) - 1;
list_del(&instr->dest.dest.reg.def_link);
- nir_ssa_dest_init(&instr->instr, &instr->dest.dest, num_components, name);
+ nir_ssa_dest_init(&instr->instr, &instr->dest.dest, num_components,
+ reg->bit_size, name);
if (nir_op_infos[instr->op].output_size == 0) {
/*
nir_intrinsic_load_var);
load->num_components = 4;
load->variables[0] = ttn_array_deref(c, load, var, offset, indirect);
-
- nir_ssa_dest_init(&load->instr, &load->dest, 4, NULL);
+ nir_ssa_dest_init(&load->instr, &load->dest,
+ 4, 32, NULL);
nir_builder_instr_insert(b, &load->instr);
src = nir_src_for_ssa(&load->dest.ssa);
load = nir_intrinsic_instr_create(b->shader, op);
load->num_components = ncomp;
- nir_ssa_dest_init(&load->instr, &load->dest, ncomp, NULL);
+ nir_ssa_dest_init(&load->instr, &load->dest, ncomp, 32, NULL);
nir_builder_instr_insert(b, &load->instr);
src = nir_src_for_ssa(&load->dest.ssa);
}
load->src[srcn++] = nir_src_for_ssa(offset);
- nir_ssa_dest_init(&load->instr, &load->dest, 4, NULL);
+ nir_ssa_dest_init(&load->instr, &load->dest, 4, 32, NULL);
nir_builder_instr_insert(b, &load->instr);
src = nir_src_for_ssa(&load->dest.ssa);
assert(src_number == num_srcs);
- nir_ssa_dest_init(&instr->instr, &instr->dest, 4, NULL);
+ nir_ssa_dest_init(&instr->instr, &instr->dest, 4, 32, NULL);
nir_builder_instr_insert(b, &instr->instr);
/* Resolve the writemask on the texture op. */
txs->src[0].src = nir_src_for_ssa(ttn_channel(b, src[0], X));
txs->src[0].src_type = nir_tex_src_lod;
- nir_ssa_dest_init(&txs->instr, &txs->dest, 3, NULL);
+ nir_ssa_dest_init(&txs->instr, &txs->dest, 3, 32, NULL);
nir_builder_instr_insert(b, &txs->instr);
- nir_ssa_dest_init(&qlv->instr, &qlv->dest, 1, NULL);
+ nir_ssa_dest_init(&qlv->instr, &qlv->dest, 1, 32, NULL);
nir_builder_instr_insert(b, &qlv->instr);
ttn_move_dest_masked(b, dest, &txs->dest.ssa, TGSI_WRITEMASK_XYZ);
}
nir_ssa_dest_init(&sel->instr, &sel->dest.dest,
- phi->dest.ssa.num_components, phi->dest.ssa.name);
+ phi->dest.ssa.num_components, 32, phi->dest.ssa.name);
sel->dest.write_mask = (1 << phi->dest.ssa.num_components) - 1;
nir_ssa_def_rewrite_uses(&phi->dest.ssa,
load->num_components = 1;
load->const_index[0] = VC4_NIR_TLB_COLOR_READ_INPUT + sample;
load->src[0] = nir_src_for_ssa(nir_imm_int(b, 0));
- nir_ssa_dest_init(&load->instr, &load->dest, 1, NULL);
+ nir_ssa_dest_init(&load->instr, &load->dest, 1, 32, NULL);
nir_builder_instr_insert(b, &load->instr);
return &load->dest.ssa;
}
nir_intrinsic_instr_create(b->shader,
nir_intrinsic_load_sample_mask_in);
load->num_components = 1;
- nir_ssa_dest_init(&load->instr, &load->dest, 1, NULL);
+ nir_ssa_dest_init(&load->instr, &load->dest, 1, 32, NULL);
nir_builder_instr_insert(b, &load->instr);
nir_ssa_def *bitmask = &load->dest.ssa;
intr_comp->num_components = 1;
intr_comp->const_index[0] = intr->const_index[0] * 4 + i;
intr_comp->src[0] = nir_src_for_ssa(nir_imm_int(b, 0));
- nir_ssa_dest_init(&intr_comp->instr, &intr_comp->dest, 1, NULL);
+ nir_ssa_dest_init(&intr_comp->instr, &intr_comp->dest, 1, 32, NULL);
nir_builder_instr_insert(b, &intr_comp->instr);
vpm_reads[i] = &intr_comp->dest.ssa;
intr_comp->const_index[0] = intr->const_index[0] * 4 + i;
intr_comp->src[0] = nir_src_for_ssa(nir_imm_int(b, 0));
- nir_ssa_dest_init(&intr_comp->instr, &intr_comp->dest, 1, NULL);
+ nir_ssa_dest_init(&intr_comp->instr, &intr_comp->dest, 1, 32, NULL);
nir_builder_instr_insert(b, &intr_comp->instr);
dests[i] = &intr_comp->dest.ssa;
nir_intrinsic_instr *intr_comp =
nir_intrinsic_instr_create(c->s, intr->intrinsic);
intr_comp->num_components = 1;
- nir_ssa_dest_init(&intr_comp->instr, &intr_comp->dest, 1, NULL);
+ nir_ssa_dest_init(&intr_comp->instr, &intr_comp->dest, 1, 32, NULL);
/* Convert the uniform (not user_clip_plane) offset to bytes.
* If it happens to be a constant, constant-folding will clean
txf->src[0].src_type = nir_tex_src_coord;
txf->src[0].src = nir_src_for_ssa(nir_vec2(b, addr, nir_imm_int(b, 0)));
- nir_ssa_dest_init(&txf->instr, &txf->dest, 4, NULL);
+ nir_ssa_dest_init(&txf->instr, &txf->dest, 4, 32, NULL);
nir_builder_instr_insert(b, &txf->instr);
nir_ssa_def_rewrite_uses(&txf_ms->dest.ssa,
nir_src_for_ssa(&txf->dest.ssa));
intr->const_index[0] = (VC4_NIR_STATE_UNIFORM_OFFSET + contents) * 4;
intr->num_components = 1;
intr->src[0] = nir_src_for_ssa(nir_imm_int(b, 0));
- nir_ssa_dest_init(&intr->instr, &intr->dest, 1, NULL);
+ nir_ssa_dest_init(&intr->instr, &intr->dest, 1, 32, NULL);
nir_builder_instr_insert(b, &intr->instr);
return &intr->dest.ssa;
}
if (mul == NULL)
continue;
+ unsigned bit_size = add->dest.dest.ssa.bit_size;
+
nir_ssa_def *mul_src[2];
mul_src[0] = mul->src[0].src.ssa;
mul_src[1] = mul->src[1].src.ssa;
nir_op_fabs);
abs->src[0].src = nir_src_for_ssa(mul_src[i]);
nir_ssa_dest_init(&abs->instr, &abs->dest.dest,
- mul_src[i]->num_components, NULL);
+ mul_src[i]->num_components, bit_size, NULL);
abs->dest.write_mask = (1 << mul_src[i]->num_components) - 1;
nir_instr_insert_before(&add->instr, &abs->instr);
mul_src[i] = &abs->dest.dest.ssa;
nir_op_fneg);
neg->src[0].src = nir_src_for_ssa(mul_src[0]);
nir_ssa_dest_init(&neg->instr, &neg->dest.dest,
- mul_src[0]->num_components, NULL);
+ mul_src[0]->num_components, bit_size, NULL);
neg->dest.write_mask = (1 << mul_src[0]->num_components) - 1;
nir_instr_insert_before(&add->instr, &neg->instr);
mul_src[0] = &neg->dest.dest.ssa;
nir_ssa_dest_init(&ffma->instr, &ffma->dest.dest,
add->dest.dest.ssa.num_components,
+ bit_size,
add->dest.dest.ssa.name);
nir_ssa_def_rewrite_uses(&add->dest.dest.ssa,
nir_src_for_ssa(&ffma->dest.dest.ssa));
load->num_components = 4;
load->variables[0] = nir_deref_var_create(load, c->input_vars[prog_src->Index]);
- nir_ssa_dest_init(&load->instr, &load->dest, 4, NULL);
+ nir_ssa_dest_init(&load->instr, &load->dest, 4, 32, NULL);
nir_builder_instr_insert(b, &load->instr);
src.src = nir_src_for_ssa(&load->dest.ssa);
nir_intrinsic_instr *load =
nir_intrinsic_instr_create(b->shader, nir_intrinsic_load_var);
- nir_ssa_dest_init(&load->instr, &load->dest, 4, NULL);
+ nir_ssa_dest_init(&load->instr, &load->dest, 4, 32, NULL);
load->num_components = 4;
load->variables[0] = nir_deref_var_create(load, c->parameters);
} else {
assert(swizzle != SWIZZLE_NIL);
nir_alu_instr *mov = nir_alu_instr_create(b->shader, nir_op_fmov);
- nir_ssa_dest_init(&mov->instr, &mov->dest.dest, 1, NULL);
+ nir_ssa_dest_init(&mov->instr, &mov->dest.dest, 1, 32, NULL);
mov->dest.write_mask = 0x1;
mov->src[0] = src;
mov->src[0].swizzle[0] = swizzle;
assert(src_number == num_srcs);
- nir_ssa_dest_init(&instr->instr, &instr->dest, 4, NULL);
+ nir_ssa_dest_init(&instr->instr, &instr->dest, 4, 32, NULL);
nir_builder_instr_insert(b, &instr->instr);
/* Resolve the writemask on the texture op. */
nir_intrinsic_instr_create(shader, nir_intrinsic_load_var);
load_x->num_components = 1;
load_x->variables[0] = nir_deref_var_create(load_x, var);
- nir_ssa_dest_init(&load_x->instr, &load_x->dest, 1, NULL);
+ nir_ssa_dest_init(&load_x->instr, &load_x->dest, 1, 32, NULL);
nir_builder_instr_insert(b, &load_x->instr);
nir_ssa_def *f001 = nir_vec4(b, &load_x->dest.ssa, nir_imm_float(b, 0.0),