m68k.md (movsf_cf_soft): Provide the same non-mov3q alternatives as movsi_cf.
authorRichard Sandiford <richard@codesourcery.com>
Tue, 6 Mar 2007 08:59:20 +0000 (08:59 +0000)
committerRichard Sandiford <rsandifo@gcc.gnu.org>
Tue, 6 Mar 2007 08:59:20 +0000 (08:59 +0000)
gcc/
* config/m68k/m68k.md (movsf_cf_soft): Provide the same non-mov3q
alternatives as movsi_cf.
(movsf_cf_hard): Add commentary.

From-SVN: r122606

gcc/ChangeLog
gcc/config/m68k/m68k.md

index cd09c8d84b316c1f4a8d57e78596bd0bdff0a543..00385a640cafb7b31997917a725e59402c1c9895 100644 (file)
@@ -1,3 +1,9 @@
+2007-03-06  Richard Sandiford  <richard@codesourcery.com>
+
+       * config/m68k/m68k.md (movsf_cf_soft): Provide the same non-mov3q
+       alternatives as movsi_cf.
+       (movsf_cf_hard): Add commentary.
+
 2007-03-06  Kazu Hirata  <kazu@codesourcery.com>
            Richard Sandiford  <richard@codesourcery.com>
 
index 4c0878a1df2becaad6be87420e2a7782a29fdc97..40c80721b097fb343dea389464cae5566a7c29f3 100644 (file)
 })
 
 (define_insn "movsf_cf_soft"
-  [(set (match_operand:SF 0 "nonimmediate_operand" "=r,g")
-       (match_operand:SF 1 "general_operand" "g,r"))]
+  [(set (match_operand:SF 0 "nonimmediate_operand" "=r<Q>,g,U")
+       (match_operand:SF 1 "general_operand" "g,r<Q>,U"))]
   "TARGET_COLDFIRE && !TARGET_COLDFIRE_FPU"
 {
   return "move%.l %1,%0";
 })
 
+;; SFmode MEMs are restricted to modes 2-4 if TARGET_COLDFIRE_FPU.
+;; The move instructions can handle all combinations.
 (define_insn "movsf_cf_hard"
   [(set (match_operand:SF 0 "nonimmediate_operand" "=r<Q>U, f,    f,mr,f,r<Q>,f
 ,m")