drivers: clean up / fixes
authorFlorent Kermarrec <florent@enjoy-digital.fr>
Thu, 22 May 2014 16:14:03 +0000 (18:14 +0200)
committerFlorent Kermarrec <florent@enjoy-digital.fr>
Thu, 22 May 2014 16:33:28 +0000 (18:33 +0200)
miscope/host/drivers.py
miscope/storage.py

index f6258219d83768df13c116ce185cd96d437a0251..7668af673dceed80d6965c08fe7d680d9f384ef4 100644 (file)
@@ -52,7 +52,7 @@ class MiLaDriver():
 
        def build_mila(self):
                for key, value in self.regs.d.items():
-                       if self.name in key:
+                       if self.name == key[:len(self.name)]:
                                key.replace(self.name, "mila")
                                setattr(self, key, value)
                value = 1
@@ -97,24 +97,21 @@ class MiLaDriver():
                        self.mila_trigger_sum_prog_dat.write(dat)
                        self.mila_trigger_sum_prog_we.write(1)
                        
-       def enable_rle(self):
-               self.mila_rle_enable.write(1)
-       
-       def disable_rle(self):
-               self.mila_rle_enable.write(0)
+       def config_rle(self, v):
+               self.mila_rle_enable.write(v)
 
        def is_done(self):
                return self.mila_recorder_done.read()
 
        def wait_done(self):
-               self.show_state("WAIT")
+               self.show_state("WAIT HIT")
                while(not self.is_done()):
                        time.sleep(0.1)
 
        def trigger(self, offset, length):
                self.show_state("TRIG")
-               if self.use_rle:
-                       self.enable_rle()
+               if self.with_rle:
+                       self.config_rle(self.use_rle)
                self.mila_recorder_offset.write(offset)
                self.mila_recorder_length.write(length)
                self.mila_recorder_trigger.write(1)
@@ -129,7 +126,7 @@ class MiLaDriver():
                if self.use_rle:
                        self.dat = self.dat.decode_rle()
                if vcd:
-                       self.show_state("VCD", last=True)
+                       self.show_state("OUTPUT", last=True)
                        _vcd = Vcd()
                        _vcd.add_from_layout(self.layout, self.dat)
                        _vcd.write(vcd)
index bff03ae9057cbeb9b30372a32c69d264382275da..a3572cac9be8e45226c627fb735173d3cd76cfcb 100644 (file)
@@ -18,9 +18,6 @@ class RunLengthEncoder(Module, AutoCSR):
                ###
 
                enable = self._r_enable.storage
-                       
-               fsm = FSM(reset_state="BYPASS")
-               self.submodules += fsm
 
                sink_d = rec_dat(width)
                self.sync += If(self.sink.stb, sink_d.eq(self.sink))
@@ -41,6 +38,9 @@ class RunLengthEncoder(Module, AutoCSR):
                change = Signal()
                self.comb += change.eq(self.sink.stb & (self.sink.dat != sink_d.dat))
 
+               fsm = FSM(reset_state="BYPASS")
+               self.submodules += fsm
+
                fsm.act("BYPASS",
                        sink_d.connect(self.source),
                        cnt_reset.eq(1),