x86 - add speculation_barrier pattern
authorRichard Earnshaw <rearnsha@arm.com>
Wed, 1 Aug 2018 08:16:38 +0000 (08:16 +0000)
committerRichard Earnshaw <rearnsha@gcc.gnu.org>
Wed, 1 Aug 2018 08:16:38 +0000 (08:16 +0000)
This patch adds a speculation barrier for x86, based on my
understanding of the required mitigation for that CPU, which is to use
an lfence instruction.

This patch needs some review by an x86 expert and if adjustments are
needed, I'd appreciate it if they could be picked up by the port
maintainer.  This is supposed to serve as an example of how to deploy
the new __builtin_speculation_safe_value() intrinsic on this
architecture.

* config/i386/i386.md (unspecv): Add UNSPECV_SPECULATION_BARRIER.
(speculation_barrier): New insn.

From-SVN: r263196

gcc/ChangeLog
gcc/config/i386/i386.md

index b934f43208f922315b20d58bdc45a5a3ce41fc18..6b2e93bb48a381b0bfded20e92d0d1e8b5f61984 100644 (file)
@@ -1,3 +1,8 @@
+2018-08-01  Richard Earnshaw  <rearnsha@arm.com>
+
+       * config/i386/i386.md (unspecv): Add UNSPECV_SPECULATION_BARRIER.
+       (speculation_barrier): New insn.
+
 2018-08-01  Richard Biener  <rguenther@suse.de>
 
        PR bootstrap/86724
index 559ad9334a77429b911a0deef284ed10b702b731..73948c12618df2c06846574d63775b5d2a79412a 100644 (file)
 
   ;; For CLDEMOTE support
   UNSPECV_CLDEMOTE
+
+  ;; For Speculation Barrier support
+  UNSPECV_SPECULATION_BARRIER
 ])
 
 ;; Constants to represent rounding modes in the ROUND instruction
   [(set_attr "type" "other")
    (set_attr "memory" "unknown")])
 
+(define_insn "speculation_barrier"
+  [(unspec_volatile [(const_int 0)] UNSPECV_SPECULATION_BARRIER)]
+  ""
+  "lfence"
+  [(set_attr "type" "other")
+   (set_attr "length" "3")])
+
 (include "mmx.md")
 (include "sse.md")
 (include "sync.md")