Proper SigBit forming in sim

diff --git a/passes/sat/sim.cc b/passes/sat/sim.cc
index b56ccb987e01d7d4f413a4199a5aa5af0fb0053b..8081ffffebf046c6e33bb3025f5d2130ca21ab5b 100644 (file)
--- a/passes/sat/sim.cc
+++ b/passes/sat/sim.cc
@@ -1708,13 +1708,13 @@ struct AIWWriter : public OutputWriter
                        if (index < w->start_offset || index > w->start_offset + w->width)
                                log_error("Index %d for wire %s is out of range\n", index, log_signal(w));
                        if (type == "input") {
-                               aiw_inputs[variable] = SigBit(w,index);
+                               aiw_inputs[variable] = SigBit(w,index-w->start_offset);
                        } else if (type == "init") {
-                               aiw_inits[variable] = SigBit(w,index);
+                               aiw_inits[variable] = SigBit(w,index-w->start_offset);
                        } else if (type == "latch") {
-                               aiw_latches[variable] = {SigBit(w,index), false};
+                               aiw_latches[variable] = {SigBit(w,index-w->start_offset), false};
                        } else if (type == "invlatch") {
-                               aiw_latches[variable] = {SigBit(w,index), true};
+                               aiw_latches[variable] = {SigBit(w,index-w->start_offset), true};
                        }
                }