GL_CURRENT_BIT |
GL_DEPTH_BUFFER_BIT |
GL_ENABLE_BIT |
+ GL_POLYGON_BIT |
GL_STENCIL_BUFFER_BIT |
GL_TRANSFORM_BIT |
GL_CURRENT_BIT);
_mesa_Disable(GL_CLIP_PLANE3);
_mesa_Disable(GL_CLIP_PLANE4);
_mesa_Disable(GL_CLIP_PLANE5);
+ _mesa_PolygonMode(GL_FRONT_AND_BACK, GL_FILL);
if (ctx->Extensions.ARB_fragment_program && ctx->FragmentProgram.Enabled) {
saved_fp_enable = GL_TRUE;
_mesa_Disable(GL_FRAGMENT_PROGRAM_ARB);
}
}
+#if FEATURE_ARB_vertex_buffer_object
+ _mesa_BindBufferARB(GL_ARRAY_BUFFER_ARB, 0);
+ _mesa_BindBufferARB(GL_ELEMENT_ARRAY_BUFFER_ARB, 0);
+#endif
+
radeon_meta_set_passthrough_transform(rmesa);
for (i = 0; i < 4; i++) {