freedreno/a6xx: samplerBuffer fixes
authorRob Clark <robdclark@gmail.com>
Wed, 20 Feb 2019 22:33:23 +0000 (17:33 -0500)
committerRob Clark <robdclark@gmail.com>
Wed, 20 Feb 2019 23:50:08 +0000 (18:50 -0500)
Use the 'UNK31' bit (which should probably be called 'BUFFER') for
samplerBuffer case, which increases the size of supported buffer
texture beyond 2^15 elements.

Also need to fix the 2nd coord injected to handle the tex instructions
that take integer coords.

Fixes dEQP-GLES31.functional.texture.texture_buffer.render.as_fragment_texture.buffer_size_131071
and similar

Signed-off-by: Rob Clark <robdclark@gmail.com>
src/freedreno/ir3/ir3_compiler_nir.c
src/gallium/drivers/freedreno/a6xx/fd6_texture.c
src/gallium/drivers/freedreno/freedreno_screen.c

index 8599d910ad3a29a5a0f990c30a0f01cab71b183c..6fb899f611c6915e0b4bf5c2240ae72ea9f4ef39 100644 (file)
@@ -1573,9 +1573,18 @@ emit_tex(struct ir3_context *ctx, nir_tex_instr *tex)
        if (coords == 1) {
                /* hw doesn't do 1d, so we treat it as 2d with
                 * height of 1, and patch up the y coord.
-                * TODO: y coord should be (int)0 in some cases..
                 */
-               src0[nsrc0++] = create_immed(b, fui(0.5));
+               switch (opc) {
+               case OPC_ISAM:
+               case OPC_ISAML:
+               case OPC_ISAMM:
+                       /* These instructions expect integer coord: */
+                       src0[nsrc0++] = create_immed(b, 0);
+                       break;
+               default:
+                       src0[nsrc0++] = create_immed(b, fui(0.5));
+                       break;
+               }
        }
 
        if (tex->is_shadow && tex->op != nir_texop_lod)
index 171a016d985e384908f80968c6299308d4ada2d8..0d6bec72b14ffe6a346a3ef0e934e309b5b41ea6 100644 (file)
@@ -260,11 +260,11 @@ fd6_sampler_view_create(struct pipe_context *pctx, struct pipe_resource *prsc,
 
                lvl = 0;
                so->texconst1 =
-                       A6XX_TEX_CONST_1_WIDTH(elements) |
-                       A6XX_TEX_CONST_1_HEIGHT(1);
+                       A6XX_TEX_CONST_1_WIDTH(elements & MASK(15)) |
+                       A6XX_TEX_CONST_1_HEIGHT(elements >> 15);
                so->texconst2 =
-                       A6XX_TEX_CONST_2_FETCHSIZE(fd6_pipe2fetchsize(format)) |
-                       A6XX_TEX_CONST_2_PITCH(elements * rsc->cpp);
+                       A6XX_TEX_CONST_2_UNK4 |
+                       A6XX_TEX_CONST_2_UNK31;
                so->offset = cso->u.buf.offset;
        } else {
                unsigned miplevels;
index c5a96a87dc049c379f6ec6766cdbaa500823f4b1..d9918f45c37bfc4b105e240da7257365cd9bb2ba 100644 (file)
@@ -243,7 +243,7 @@ fd_screen_get_param(struct pipe_screen *pscreen, enum pipe_cap param)
                if (is_a3xx(screen)) return 16;
                if (is_a4xx(screen)) return 32;
                if (is_a5xx(screen)) return 32;
-               if (is_a6xx(screen)) return 32;
+               if (is_a6xx(screen)) return 64;
                return 0;
        case PIPE_CAP_MAX_TEXTURE_BUFFER_SIZE:
                /* We could possibly emulate more by pretending 2d/rect textures and
@@ -252,7 +252,7 @@ fd_screen_get_param(struct pipe_screen *pscreen, enum pipe_cap param)
                if (is_a3xx(screen)) return 8192;
                if (is_a4xx(screen)) return 16384;
                if (is_a5xx(screen)) return 16384;
-               if (is_a6xx(screen)) return 16384;
+               if (is_a6xx(screen)) return 1 << 27;
                return 0;
 
        case PIPE_CAP_TEXTURE_FLOAT_LINEAR: