build/lattice/common/LatticeECXTrellisImpl: add support for nbits == 1

diff --git a/litex/build/lattice/common.py b/litex/build/lattice/common.py
index 45baddb81522c5b871c05aa35838a8d50be97d00..d1e7e82e55c800aebd520ab5589761a0511a5e24 100644 (file)
--- a/litex/build/lattice/common.py
+++ b/litex/build/lattice/common.py
@@ -44,8 +44,19 @@ lattice_ecpx_special_overrides = {
 class LatticeECPXTrellisTristateImpl(Module):
     def __init__(self, io, o, oe, i):
         nbits, sign = value_bits_sign(io)
-        for bit in range(nbits):
+        if nbits == 1:
+            # If `io` is an expression like `port[x]`, it is not legal to index further
+            # into it if it is only 1 bit wide.
             self.specials += \
+              Instance("TRELLIS_IO",
+                    p_DIR="BIDIR",
+                    i_B=io,
+                    i_I=o,
+                    o_O=i,
+                    i_T=~oe,
+                )
+        else:
+            for bit in range(nbits):
                 Instance("TRELLIS_IO",
                     p_DIR="BIDIR",
                     i_B=io[bit],
@@ -54,6 +65,7 @@ class LatticeECPXTrellisTristateImpl(Module):
                     i_T=~oe,
                 )
 
+
 class LatticeECPXTrellisTristate(Module):
     @staticmethod
     def lower(dr):