[RTL ifcvt] Allow simple register subregs in noce_convert_multiple_sets

	* ifcvt.c (bb_ok_for_noce_multiple_sets): Allow simple lowpart
	register subregs in SET_SRC.

	* gcc.target/aarch64/ifcvt_multiple_sets_subreg_1.c: New test.

From-SVN: r237475

diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index ebc4d6eeca1589572692f5fce7edf831a370bf14..6eb52a939754046acade7f7564d9f332a4473f7f 100644 (file)
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,3 +1,8 @@
+2016-06-15  Kyrylo Tkachov  <kyrylo.tkachov@arm.com>
+
+       * ifcvt.c (bb_ok_for_noce_multiple_sets): Allow simple lowpart
+       register subregs in SET_SRC.
+
 2016-06-15  Richard Biener  <rguenther@suse.de>
 
        * tree-vect-stmts.c (vectorizable_store): Remove strided grouped

diff --git a/gcc/ifcvt.c b/gcc/ifcvt.c
index 4a277db7dcc4cd467299419b21bae0f2a2b42926..fd2951673fb6bd6d9e5d52cdb88765434a603fb6 100644 (file)
--- a/gcc/ifcvt.c
+++ b/gcc/ifcvt.c
@@ -3339,9 +3339,15 @@ bb_ok_for_noce_convert_multiple_sets (basic_block test_bb,
       rtx src = SET_SRC (set);
 
       /* We can possibly relax this, but for now only handle REG to REG
-        moves.  This avoids any issues that might come from introducing
-        loads/stores that might violate data-race-freedom guarantees.  */
-      if (!(REG_P (src) && REG_P (dest)))
+        (including subreg) moves.  This avoids any issues that might come
+        from introducing loads/stores that might violate data-race-freedom
+        guarantees.  */
+      if (!REG_P (dest))
+       return false;
+
+      if (!(REG_P (src)
+          || (GET_CODE (src) == SUBREG && REG_P (SUBREG_REG (src))
+              && subreg_lowpart_p (src))))
        return false;
 
       /* Destination must be appropriate for a conditional write.  */

diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog
index 679f0225109bd3a7f77f8011e09a1eaf224117f1..e5100ab6892df1c43cf00ce26de7e036823a57f1 100644 (file)
--- a/gcc/testsuite/ChangeLog
+++ b/gcc/testsuite/ChangeLog
@@ -1,3 +1,7 @@
+2016-06-15  Kyrylo Tkachov  <kyrylo.tkachov@arm.com>
+
+       * gcc.target/aarch64/ifcvt_multiple_sets_subreg_1.c: New test.
+
 2016-06-15  Richard Biener  <rguenther@suse.de>
 
        * gcc.dg/vect/slp-45.c: New testcase.

diff --git a/gcc/testsuite/gcc.target/aarch64/ifcvt_multiple_sets_subreg_1.c b/gcc/testsuite/gcc.target/aarch64/ifcvt_multiple_sets_subreg_1.c
new file mode 100644 (file)
index 0000000..ac6ffdc
--- /dev/null
+++ b/gcc/testsuite/gcc.target/aarch64/ifcvt_multiple_sets_subreg_1.c
@@ -0,0 +1,30 @@
+/* { dg-do compile } */
+/* { dg-options "-O2 -fdump-rtl-ce1" } */
+
+/* Check that the inner if is transformed into CSELs.  */
+
+int
+foo (int *x, int *z, int a)
+{
+  int b = 0;
+  int c = 0;
+  int d = 0;
+  int i;
+
+  for (i = 0; i < a; i++)
+    {
+      if (x[i] < c)
+       {
+         b = z[i];
+         if (c < b)
+           {
+             c = b;
+             d = i;
+           }
+       }
+    }
+
+  return c + d;
+}
+
+/* { dg-final { scan-rtl-dump "if-conversion succeeded through noce_convert_multiple_sets" "ce1" } } */